Toshiba TDP-D1 Service Manual page 88

RESET and Non-Maskable Interrupts (NMI)
Drive the RESET pin active during power up and hold it active until after the MCLK input
starts toggling. This can be accomplished by using either an RC circuit, a TLC7733 Reset IC, or the
equivalent. Figure 2 shows an example of the RESET circuit used with a Pixelworks ImageProcessor.
This circuit holds RESET active for 2.1 ms to allow the clock signals to stabilize.
The minimum pulse width value of the RESET input defined in the ImageP rocessor
specification must be met. In addition, the ROM emulator needs to be able to drive the RESET pin
of the ImageProcessor. An external RESET signal may be 5V CMOS and must be buffered to 3V to
interface to the ImageProcessor RESET pin. The RESET and NMI inputs to the Pixelworks
ImageProcessor are not 5V tolerant, therefore, ensure that these inputs are not driven above 3.3V.
The Non-maskable Interrupt (NMI) is used to stop the on-chip CPU when debugging using a ROM
Emulator. Connect the NMI pin of the ImageProcessor to a switch or buffered ROM Emulator NMI
output.
Figure 2. Sample RESET/NMI/WE Circuit
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