Schematic Diagrams - Yamaha RX-V461 Service Manual

A B C

SCHEMATIC DIAGRAMS

DSP 1/6
1
Q Q
7
3
2
3
EEPROM
3.3 3.3
0.1
3.3 3.3
0 3.3
4
to DSP 5/6
5
to DSP 6/6
T E
L 1 3 9 4
to DSP 3/6
6
to DSP 5/6
7
to DSP 4/6
to DSP 2/6
to DSP 3/6, 4/6
8
to DSP 3/6
Not applied to these models.
9
w w w
.
10
D E F
1 5 1
6 3
0
0
0
1.9
3.3
1.9
3.3
0
0
0
1.7
3
1.7
3.3
3.3
0
0
0
0
3.3
1.4
3.2
0
2 2 9 6 5 1 3 0
0
3.3
0
0
3.3
1.7
0
0
3.3
0
0
0
0
0
0
POINT 3 Pin 11 of IC101
x a o
y
i
G H
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5
0 8
to DSP 2/6
to DSP 6/6
MICROPROCESSOR
with DSP
IC101
Q Q
3 7 6 3
IC101: ADSP-BF531 CPU
Microprocessor with DSP
IC102: BR25L320F-W EEPROM
JTAG test
and emulation
SPI BUS 32 k-bit (4,096 x 8-bit) EEPROM
Voltage
regulator
u 1 6 3
1 8 Vcc
CS VOLTAGE
INSTRUCTION DECODE DETECTION
CONTROL CLOCK
L1 order
GENERATION .
memory
WRITE HIGH VOLTAGE
SO 2 INHIBITION GENERATOR 7 HOLD
INSTRUCTION
REGISTER
STATUS REGISTER
WP 3 6 SCK
ADDRESS ADDRESS
12bit 12bit
REGISTER DECODER
32,768bit
EEPROM
DATA READ/WRITE
8bit 8bit
REGISTER AMP
GND 4 5 SI
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I J K
2 4
9 9
to DSP 5/6
0
0
0
0
0
2.7
0
RD35433 RD35447
0 33
0
0
0.3
0
3.3
0
0
0.3
0.4
0.4
0.4
1.4
0.4
0.4
0.4
3.3
0
2.1
1 2.0 5 1 5 0 8 9 2
2.0
2.2
2.3
2.3
2.2
2.5
0
3.3
0
0
3.3
0
0
0
0
Event controller/
Watch dock timer
Core timer
m
Real time clock
c o
UART port IrDA®
Memory
L1 data
management
memory
unit
Timer0, Timer1, Timer2
Core/System bus interface
PPI/GPIO
DMA controller
Serial port (2)
SPI port
Boot ROM
External port for flash
and SDRAM control
L M N
RX-V461/HTR-6040/RX-V461DAB
2
8 9 9
RD35433
47 33
to DSP 2/6
4 9 8 2 9 9
to DSP 6/6
to DSP 5/6
# All voltages are measured with a 10MΩ/V DC electronic voltmeter.
# Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
# Schematic diagram is subject to change without notice.
67