Yamaha RX-V461 Service Manual page 41

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Pin No. Function Name
1 INT1
2 BOUT
3 TVDD
4 DVDD
5 DVSS
6 XTO
7 XTI
8 TEST3
9 MCKO2
10 MCKO1
11 COUT
12 UOUT
13 VOUT
14 SDTO2
15 BICK2
16 LRCK2
17 SDTO1
18 BICK1
19 LRCK1
20 CDTO
CCLK
21
SCL
CDTI
TE
22
L 13942296513
SDA
23 CSN
24 DAUX1
25 SDTI4
26 SDTI3
27 SDTI2
28 SDTI1
29 XTL1
30 XTL0
31 PDN
32 MASTER
DZF2
33
OVF
34 DZF1
35 LOUT4
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36
37 ROUT4
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38
39 LOUT3
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I/O
O Interrupt 1 pin
O Block-start output pin for receiver input "H" during first 40 flames
– Output buffer power supply pin, 2.7 V to 5.5 V
– Digital power supply pin, 4.5 V to 5.5 V
– Digital ground pin
O X'tal clock output pin
I X'tal / External clock input pin
Test 3 pin
I
This pin should be connected to DVSS
O Master clock output 2 pin
O Master clock output 1 pin
O C-bit output pin for receiver input
O U-bit output pin for receiver input
O V-bit output pin for receiver input
O Audio serial data output pin (DIR/DIT part)
I/O Audio serial data clock pin (DIR/DIT part)
I/O Channel clock pin (DIR/DIT part)
O Audio serial data output pin (ADC/DAC part)
I/O Audio serial data clock pin (ADC/DAC part)
I/O Input channel clock pin
O Control data output pin in serial mode, I2C pin= "L"
I Control data clock pin in serial mode, I2C pin= "L"
I Control data clock pin in serial mode, I2C pin= "H"
I Control data input pin in serial mode, I2C pin= "L"
I/O Control data pin in serial mode, I2C pin= "H"
I Chip select pin in serial mode, I2C pin="L"
I This pin should be connected to DVSS, I2C pin="H"
I AUX audio serial data input pin (ADC/DAC part)
I DAC4 audio serial data input pin
I DAC3 audio serial data input pin
I DAC2 audio serial data input pin
I DAC1 audio serial data input pin
I X'tal frequency select 0 pin
I X'tal frequency select 1 pin
Power-down mode pin
I When "L", the AK4588 is powered-down, all output pin goes "L", all registers are reset
When CAD1-0 pins are changed, the AK4588 should be reset by PDN pin
Master mode select pin
I
"H": Master mode, "L": Slave mode
Zero input detect 2 pin (table 13)
O When the input data of the group 1 follow total 8192 LRCK cycles with "0" input data, this pin
goes to "H" / When RSTN1 bit is "0" or PWDAN bit is "0", this pin goes to "H"
Analog input overflow detect pin
O This pin goes to "H" if the analog input of L ch or R ch overflows
This pin becomes OVF pin if OVFE bit is set to 1
Zero input detect 1 pin (table 13)
O When the input data of the group 1 follow total 8192 LRCK cycles with "0" input data, this pin
goes to "H" / When RSTN1 bit is "0" or PWDAN bit is "0", this pin goes to "H"
O DAC4 L ch analog output pin
No connect pin
NC –
No internal bonding / This pin should be opened
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O DAC4 R ch analog output pin
No connect pin
i
NC –
No internal bonding / This pin should be opened
O DAC3 L ch analog output pin
No connect pin
NC –
No internal bonding / This pin should be opened
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8
Detail of Function
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3 6 7 1 3
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RX-V461/HTR-6040/RX-V461DAB
2 9 9 4 2 8
1 5 0 5 8 2 9 9 4
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9 9
2 8 9 9
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