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Table 5.
PXA255 processor 256-Lead 17x17mm mBGA Pinout — Ballpad No. Order (Sheet 1
of 3)
Ball #
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
C1
C2
C3
C4
20
Signal
Ball #
VCCN
L_DD[13]/GPIO[71]
L_DD[12]/GPIO[70]
L_DD[11]/GPIO[69]
L_DD[9]/GPIO[67]
L_DD[7]/GPIO[65]
GPIO[11]
L_BIAS/GPIO[77]
SSPRXD/GPIO[26]
SDATA_OUT/GPIO[30]
SDA
FFDCD/GPIO[36]
FFRXD/GPIO[34]
FFCTS/GPIO[35]
BTCTS/GPIO[44]
SDATA_IN1/GPIO[32]
DQM[1]
DQM[2]
L_DD[15]/GPIO[73]
GPIO[14]
GPIO[13]
GPIO[12]
L_DD[3]/GPIO[61]
L_PCLK/GPIO[76]
SSPEXTCLK/GPIO[27]
FFRI/GPIO[38]
FFDSR/GPIO[37]
USB_N
BTRXD/GPIO[42]
BTRTS/GPIO[45]
IRRXD/GPIO[46]
MMDAT
RDY/GPIO[18]
VSSN
L_DD[14]/GPIO[72]
VSSQ
Intel® PXA255 Processor Electrical, Mechanical, and Thermal Specification
Signal
C10
VCCQ
C11
VSSQ
C12
USB_P
C13
VCCQ
C14
VSSQ
C15
IRTXD/GPIO[47]
C16
VSS
D1
SDCLK[2]
D2
SDCLK[0]
D3
RDnWR
D4
VCCN
D5
L_DD[10]/GPIO[68]
D6
L_DD[5]/GPIO[63]
D7
L_DD[1]/GPIO[59]
D8
L_LCLK/GPIO[75]
D9
SSPTXD/GPIO[25]
D10
nACRESET
D11
SCL
D12
PWM[1]/GPIO[17]
D13
BTTXD/GPIO[43]
D14
MMCMD
D15
VCCQ
D16
NSSPRXD/GPIO[84]
E1
nSDRAS
E2
VSSN
E3
SDCKE[1]
E4
SDCKE[0]
E5
L_DD[6]/GPIO[64]
E6
L_DD[4]/GPIO[62]
E7
L_DD[[0]/GPIO[58]
E8
L_FCLK/GPIO[74]
E9
SSPSFRM/GPIO[24]
E10
SDATA_IN0/GPIO[29]
E11
SYNC/GPIO[31]
E12
PWM[0]/GPIO[16]
E13
FFTXD/GPIO[39]
Ball #
Signal
F3
nSDCAS
F4
VCCN
F5
SDCLK[1]
F6
VSSQ
F7
GPIO[10]
F8
FFRTS/GPIO[41]
F9
SSPSCLK/GPIO[23]
F10
FFDTR/GPIO[40]
F11
VCC
F12
GPIO[9]
F13
BOOT_SEL[2]
F14
GPIO[8]
F15
VSSQ
F16
NSSPSCLK/GPIO[81]
G1
MA[0]
G2
VSSN
G3
nSDCS[2]
G4
nWE
G5
nOE
G6
nSDCS[1]
G7
VCC
G8
VSSQ
G9
VCC
G10
VSSQ
G11
TESTCLK
G12
TEST
G13
BOOT_SEL[1]
G14
VCCQ
G15
GPIO[7]
G16
BOOT_SEL[0]
H1
MA[2]
H2
MA[1]
H3
MD[16]
H4
VCCN
H5
MD[17]
H6
MA[3]
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