Intel SE7520JR2 Technical Manual page 147

Intel® Server Board SE7520JR2
Sensor
Sensor Name
Number
Processor 2
91h
Status
Processor 1 Core
98h
Temp
Processor 2 Core
99h
Temp
Processor 1 12v
B8h
VRM
Processor 2 12v
B9h
VRM
Processor 1
C0h
Thermal Control
Processor 2
C1h
Thermal Control
Processor 1 VRD
C8h
Over Temp
Processor 2 VRD
C9h
Over Temp
Processor 1 Vcc D0h
Processor 2 Vcc D1h
CPU Configuration
D8h
Error
DIMM 1 E0h
DIMM 2 E1h
DIMM 3 E2h
Revision 1.0
Event /
Sensor Type Reading
Type
Sensor
Processor
Specific
07h
6Fh
Temp Threshold
01h 01h
Temp Threshold
01h 01h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Digital
Temp
Discrete
01h
07h
Digital
Temp
Discrete
01h
07h
Digital
Temp
Discrete
01h
07h
Digital
Temp
Discrete
01h
07h
Voltage Threshold
02h 01h
Voltage Threshold
02h 01h
Processor Generic
07h 03h
Sensor
Slot Connector
Specific
21h
6Fh
Sensor
Slot Connector
Specific
21h
6Fh
Sensor
Slot Connector
Specific
21h
6Fh
Event Offset Assert /
Triggers Deassert
IERR
Thermal Trip
FRB1, FRB2,
FRB3
As & De
Config Error
Presence
Disabled
[u,l][nr,c,nc] As & De
[u,l][nr,c,nc] As & De
[u,l][ nr,c,nc] As & De
[u,l][ nr,c,nc] As & De
Transitioned to
Non-Critical from As & De
OK
Transitioned to
Non-Critical from As & De
OK
Transitioned to
Non-Critical from As & De
OK
Transitioned to
Non-Critical from As & De
OK
[u,l][ nr,c,nc] As & De
[u,l][ nr,c,nc] As & De
State Asserted As & De
Fault Status
Asserted
Device Installed
Disabled
Fault Status
Asserted
Device Installed
Disabled
Fault Status
Asserted
Device Installed
Disabled
C78844-002
Platform Management
Readable
Value / EventData
Offsets
– Trig Offset
Analog R, T
Analog R, T
Analog R, T
Analog R, T
– Trig Offset
– Trig Offset
– Trig Offset
– Trig Offset
Analog R, T
Analog R, T
Discrete
As – Trig Offset
As – Trig Offset
As – Trig Offset
M X
A –
A –
A –
A –
M –
M –
M –
M –
A –
A –
R, T A -
A –
A –
A –
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