JVC TH-A5 Service Manual page 26

TH-A5
M11B416256A (U1) : DRAM
1. Pin layout
Vcc 1 40 Vss
I/O0 2 39 I/O15
I/O1 3 38 I/O14
I/O2 4 37 I/O13
I/O3 5 36 I/O12
Vcc 6 35 Vss
I/O4 7 34 I/O11
I/O5 8 33 I/O10
I/O6 9 32 I/O9
I/O7 10 31 I/O8
NC 11 30 NC
NC 12 29 CASL
WE 13 28 CASH
RAS 14 27 OE
NC 15 26 A8
A0 16 25 A7
A1 17 24 A6
A2 18 23 A5
A3 19 22 A4
Vcc 20 21 Vss
3. Block diagram
WE
CASL
CASH
NO.2 CLOCK
GENERATOR
COLUMN
ADDRESS
9
A0
BUFFER
A1
A2
REFRESH
CONTROLLER
A3
A4
A5
REFRESH
A6
COUNTER
A7
A8
ADDRESS
9
BUFFERS(9)
NO.1 CLOCK
RAS
GENERATOR
1-26
2. Pin function
Pin No.
16~19,22~26
14
28
29
13
27
2~5,7~10,31~34,36~39
1,6,20
21,35,40
11,12,15,30
CAS CONTROL
9
ROW
9
Symbol I/O
A0~A10 I Address Input
RAS I Row Address Strobe
CASH I Column Address Strobe/Upper Byte Control
CASL I Column Address Strobe/Lower Byte Control
WE I Write Enable
OE I Output Enable
I/O0~I/O15 I/O Data Input/ Output
Vcc Supply Power, 5V
Vss Ground Ground
NC - No Connect
DATA-IN BUFFER
LOGIC
COLUMN
9
DECODER
512
SENSE AMPLIFIERS
I/O RATING
512 x 16
512 x 512 x 16
MEMORY
512
ARRAY
Function
DATA-OUT
BUFFER
16
8 8
Vcc
Vss
I/O0
. .
16
I/O15
CE