Block Diagram - JVC TH-A5 Service Manual

TH-A5
W986432DH (U5) : SDRAM
1. Pin layout
3. Pin function
Function
Symbol
A0-A10 Address
BS0, BS1 Bank Select
DQ0-DQ31 Data Input/Output
CS Chip Select
RAS Row Address Strobe
CAS Column Address Strobe
WE Write Enable
DQM0-DQM3 Input/output mask
Clock Inputs
CLK
CKE Clock Enable
VCC Power(+3.3V)
VSS Ground
VCCQ Power(+3.3V) for I/O buffer
VSSQ Ground for I/O buffer
NC No Connection
1-24

2. Block diagram

CLK
CLOCK
BUFFER
CKE
CONTROL
CS
SIGNAL
GENERATOR
RAS
COMMAND
CAS
DECODER
WE
A10
MODE
A0
REGISTER
ADDRESS
A9
BUFFER
BS0
BS1
COLUMN
REFRESH
COUNTER
COUNTER
COLUMN DECODER
CELL ARRAY
BANK #0
SENSE AMPLIFIER
DATA CONTROL
CIRCUIT
COLUMN DECODER
CELL ARRAY
BANK #2
SENSE AMPLIFIER
COLUMN DECODER
CELL ARRAY
BANK #1
SENSE AMPLIFIER
DQ0
DQ
BUFFER
DQ31
DQM0~3
COLUMN DECODER
CELL ARRAY
BANK #3
SENSE AMPLIFIER