Sony STR-DA7100ES Service Manual page 48

Sony str-da7100es fm stereo fm/am receiver - service manual
Hide thumbs Also See for STR-DA7100ES:
Table of Contents

Advertisement

STR-DA7100ES
Pin No.
Pin Name
59
RSSTART
60
SACHSEL
61
FMUTE
62, 63
FSTATE0, FSTATE1
64
FSTATE2
65
TDI
66
TDO
67
TMS
68
TCK
69
TRST
70
SANKIN
71
SAFRIN
72
SAD0IN
73
VSSCO
74
VDDCO
75 to 79
SAD1IN to SAD5IN
80
SADAIN
81
AMCKIN
82
SPDIFIN
83
SDMUTEIN
84
SDERRIN
85
VCO2O
86
VCO1O
87
REFSTY
88
VCOIN
89
VCOEN
90
VSSCORE
91
VDDCORE
92
VSSO
93
VSSPASS
94
VDDPASS
95
LPOUT
96
LPIN
97
VDDO
98
BCKIN
99
LRCKIN
100 to 102
SDA1IN to SDA3IN
103
SDA0IN
104
VSSO
105
VDDO
106 to 119
SDA0 to SDA13
120 to 127
SDD0 to SDD7
128
VSSO
129
VDDO
130 to 137
SDD8 to SDD15
138
SDCKE
139
SDCLK
140
SDDQM
141
SDRAS
142
SDCAS
48
I/O
I
Data receive start signal input terminal
I
SA-CD channel select signal input terminal
-
Not used
O
FSTATE signal output terminal
-
Not used
-
Not used
-
Not used
-
Not used
-
Not used
-
Not used
I
Audio data transfer clock signal input terminal
I
Sync signal input terminal for DSD audio signal
I
DSD audio signal input terminal
-
Ground terminal
-
Power supply terminal (+3.3V)
I
DSD audio signal input terminal
I
DSD audio signal input terminal
I
Clock signal input terminal
I
SPDIF audio signal input terminal
I
Muting on/off control signal input terminal
-
Not used
O
Clock signal output terminal
O
Serial data transfer clock signal output terminal
I
Signal input terminal for fase comparate
I
Clock signal input terminal for phase comparison
-
Not used
-
Ground terminal
-
Power supply terminal (+3.3V)
-
Ground terminal
-
Ground terminal
-
Power supply terminal (+3.3V)
-
Not used
-
Not used
-
Power supply terminal (+3.3V)
I
Bit clock signal (2.8224 MHz) input terminal
I
L/R sampling clock (44.1 kHz) input terminal
I
Audio signal input terminal
I
PCM audio supplementary signal input terminal
-
Ground terminal
-
Power supply terminal (+3.3V)
O
Address signal output to the SD-RAM
I/O
Two-way data bus with the SD-RAM
-
Ground terminal
-
Power supply terminal (+3.3V)
I/O
Two-way data bus with the SD-RAM
O
Clock enable signal output to the SD-RAM
O
Clock signal output to the SD-RAM
O
Output terminal of data input/output mask
O
Row address strobe signal output to the SD-RAM
O
Column address strobe signal output to the SD-RAM
Description

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents