Sony STR-DA7100ES Service Manual page 35

DIGITAL BOARD IC2028 CXD9722TQ (LIP SYNC ADJUST)
Pin No. Pin Name
1 to 5 D1 to D5
6 VDD
7, 8 D6, D7
9 VSS
10 WE
11 CAS
12 RAS
13 CS
14 CLK
15 CKE
16 VDD
17, 18 A11, A10
19 to 22 A0 to A3
23 VSS
24 to 29 A9 to A4
30 VSS
31 DRSO
32 DLSO
33 DEXRO
34 DLFEO
35 DCO
36 VDD
37 DRO
38 DLO
39 VSS
40 DMRO
41 DMLO
42 VSS
43 VDD
44 DLDRO
45 CSWO
46 SLSRO
47 FLFRO
48 VSS
49 SPDIFO
50 TEST1
51 TRST
52 TMS
53 TCK
54 TDI
55 TDO
56 TEST2
57 SPDIFI
58 VSS
59 LRCKI
60 BCKI
61 VDD
62 VSS
63 DLDRI
I/O
I/O Serial data input/output terminal with the SD-RAM
- Power supply terminal (+3.3V)
I/O Serial data input/output terminal with the SD-RAM
- Ground terminal
O Write enable signal output to the SD-RAM
O Column address strobe signal output to the SD-RAM
O Row address strobe signal output to the SD-RAM
O Chip select signal output to the SD-RAM
O Serial data transfer clock signal output to the SD-RAM
O Clock enable signal output to the SD-RAM
- Power supply terminal (+3.3V)
O Address signal output to the SD-RAM
O Address signal output to the SD-RAM
- Ground terminal
O Address signal output to the SD-RAM
- Ground terminal
O SR-ch analog audio signal output terminal Not used
O SL-ch analog audio signal output terminal Not used
O Not used (open)
O W-ch analog audio signal output terminal Not used
O C-ch analog audio signal output terminal Not used
O Power supply terminal (+3.3V)
O R-ch analog audio signal output terminal Not used
O L-ch analog audio signal output terminal Not used
- Ground terminal
O SBR-ch analog audio signal output terminal Not used
O SBL-ch analog audio signal output terminal Not used
- Ground terminal
- Power supply terminal (+3.3V)
O Audio serial data output terminal
O Audio serial data output terminal
O Audio serial data output terminal
O Audio serial data output terminal
- Ground terminal
O SPDIF signal output terminal Not used
I Test mode setting terminal Not used
I Reset signal input terminal for test Not used
I Mode setting terminal for test Not used
I Clock signal input terminal for test Not used
I Serial data input terminal for test Not used
O Serial data output terminal for test Not used
I Test mode setting terminal Not used
I SPDIF signal input terminal Not used
- Ground terminal
I L/R sampling clock signal (44.1 kHz) input from the digital signal processor
I Bit clock signal (2.8224 MHz) input from the digital signal processor
- Power supply terminal (+3.3V)
- Ground terminal
I Audio serial data input from the digital signal processor
STR-DA7100ES
Description
35