Ic Pin Function Description - Sony HCD-CP2 Service Manual

7-21. IC PIN FUNCTION DESCRIPTION

MAIN BOARD IC802 CXP84332-168Q (SYSTEM CONTROLLER)
Pin No. Pin Name
1 A/B
2 AMP-STBY
3 HI DUB REC
4 C-XRST
5 SPEAK RELAY
6 AMP-MUTE
7 REC-BIAS
8 REC/PB
CAP MOTOR
9
CON
CAP MOTOR
10
H/L
TRIG MOTOR
11
CON (A)
TRIG MOTOR
12
CON (B)
TRIG MOTOR
13
H/L
14 T-HALF (A)
15 T-PLAY (A)
16 TC-SHUT (A)
17 TC-SHUT (B)
18 T-PLAY (B)
19 TU-TUNED
20 TU-DATA
21 TU-CLK
22 TU-COUNT
23 TU-CE
24 RDS-DATA
25 RDS-ON
26 C/D
27 LCD DATA
28 LCD CLK
29 LCD CE
30 RESET
31 EXTAL1
32 XTAL1
33 VSS
34 TX
35 TEX
36 AVSS
44
I/O
O Deck-A/B selection signal output to the HA12203NT (IC401) "L": deck-A, "H": deck-B
O Standby on/off control signal output to the power amplifier (IC101, 201) "L": standby mode
O High speed dubbing control signal output to the HA12203NT (IC401)
O Reset signal output to the CXA1992BR (IC701) and CXD2589Q (IC703) "L": reset
O Speaker protect relay drive signal output terminal "H": relay on
O Muting on/off control signal output to the power amplifier (IC101, 201) "H": muting on
Recording bias on/off selection signal output to the HA12203NT (IC401)
O
"L": bias on, "H": bias off
Recording/playback/pass selection signal output to the HA12203NT (IC401)
O
"L": recording mode, "H": pass, "Hi-z": playback mode
O Capstan motor on/off control signal output terminal "H": motor on
High/normal speed selection signal output of the capstan motor
O
"L": normal speed, "H": high speed
Deck-A side trigger motor drive signal output to the trigger motor drive (IC402)
O
"H": motor on
Deck-B side trigger motor drive signal output to the trigger motor drive (IC402)
O
"H": motor on
O Trigger motor control signal output terminal
Detection input from the deck-A cassette detect switch (S1003)
I
"L": cassette in, "H": no cassette
I Detection input from the deck-A play detect switch (S1001) "H": deck-A play
I Shut off detection signal input from the deck-A side reel pulse detector (Q1001)
I Shut off detection signal input from the deck-B side reel pulse detector (Q1002)
I Detection input from the deck-B play detect switch (S1002) "H": deck-B play
I Tuning detection signal input from the tuner pack "L": tuned
O PLL serial data output to the tuner pack
O PLL serial data transfer clock signal output to the tuner pack
I PLL serial data input from the tuner pack
O PLL chip enable signal output to the tuner pack
RDS serial data input from the RDS decoder (IC803)
I
(Used for the AEP, UK and North European models only)
Power supply on/off control signal output of the tuner pack (+7.5V) and RDS decoder (IC803)
O
(Used for the AEP, UK and North European models only)
O Command data output to the liquid crystal display driver (IC800)
O Serial data output to the liquid crystal display driver (IC800)
O Serial data transfer clock signal output to the liquid crystal display driver (IC800)
O Chip enable signal output to the liquid crystal display driver (IC800)
System reset signal input from the reset signal generator (IC801) "L": reset
I
For several hundreds msec. after the power supply rises, "L" is input, then it changes to "H"
I Main system clock input terminal (4.19 MHz)
O Main system clock output terminal (4.19 MHz)
— Ground terminal
O Sub system clock output terminal (32.768 kHz)
I Sub system clock input terminal (32.768 kHz)
— Ground terminal (for A/D converter)
Description