Fujitsu EVB JADE-­D Manual page 29

Prepared
Manfred Ortmann
Approved
Pin
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
Document Number
Checked Date
2009­10­05
Signal
JADE_IO_G2_1
JADE_IO_G2_3
JADE_IO_G2_2
JADE_IO_G2_12
JADE_IO_G2_0
MPX_MODE_5_0
JTAG0
MPX_MODE_5_1
JTAG2
USB_MODE
JTAG4
JTAGSEL
JTAG6
JTAG1
JADE_IO_G5_0
JTAG3
JADE_IO_G5_2
JTAG5
JADE_IO_G5_4
VCC_CORE_PG
JADE_IO_G5_1
MR#
JADE_IO_G5_3
RESET#
JADE_IO_G5_5
WDI
GND
VCC18
GND
Preliminary
Revision Storage
PA 4.2 Mycable01
Function
VINHSYNC0 / GI1_4 / MLB_SIG / MLB_SIG
/ MLB_SIG
CCLK1
VINFID0 / GI1_3 / MLB_CL / MLB_CLK /
MLB_CLK
VIN1_2 / RI1_2 / CAN_RX1 / CAN_RX1 /
CAN_RX1
VINVSYNC0 / GI1_5 / MLB_DATA /
MLB_DATA / MLB_DATA
MPX_MODE_5_0
RTCK
MPX_MODE_5_1
TCK
USB_MODE
TMS
JTAGSEL
TDO
XSRST
TRACECLK / UART_SIN3 / UART_SIN3
XTRST
TRACEDATA_3 / UART_SIN4 / UART_SIN4
TDI
TRACEDATA_1 / UART_SIN5 / PWMO1
VCC_CORE_PG Pin 11 LTC3417 U200
Power good VCC12 and VCC18
TRACECTL / UART_SOUT3 / UART_SOUT3
/MR Pin 3 ADM6320 U201Manual Master
Reset
TRACEDATA_2 / UART_SOUT4 /
UART_SOUT4
/RESET Pin 1 ADM6320 U201
Reset Output
TRACEDATA_0 / UART_SOUT5 / PWMO0
WDI Pin 4 ADM6320 U201 Watchdog
Ground
1.8 V, regulated on XXS
SDRAM
Ground
29(45)
for DDR2
video