Fujitsu EVB JADE-­D Manual page 25

Prepared
Manfred Ortmann
Approved
Pin
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
Tab. 2­3: Pin assignment of connector X301, CPU signals side
Document Number
Checked Date
2009­10­05
Signal
JADE_IO_G1_15 DOUTG1_4 / MEM_ED_22 / GPIO_PD_8
JADE_IO_G1_10 DOUTR1_3 / MEM_ED_27 / I2S_SDO0
JADE_IO_G1_8 DOUTR1_5 / MEM_ED_29 / I2S_WS0
JADE_IO_G1_9 DOUTR1_4 / MEM_ED_28 / I2S_SDI0
JADE_IO_G1_11 DOUTR1_2 / MEM_ED_26 / GPIO_PD_12
JADE_IO_G1_6 DOUTR1_7 / MEM_ED_31 / I2S_ECLK0
JADE_IO_G1_1 DCLKO1
JADE_IO_G1_7 DOUTR1_6 / MEM_ED_30 / I2S_SCK0
JADE_IO_G1_5 GV1 / DREQ_7 / DREQ_7
JADE_IO_G1_4 VSYNC1 / XDACK_6 / XDACK_6
USB_PWR_CTRL USB Port Power Control
JADE_IO_G1_3 HSYNC1 / DREQ_6 / DREQ_6
USB_DP D+ for HS and FS
JADE_IO_G1_2 DE1 / XDACK_7 / XDACK_7
USB_DM D­ for HS and FS
GND Ground
GND Ground
Preliminary
Revision Storage
PA 4.2 Mycable01
Function
25(45)