Init Signal Input From Cn1 Or Cn2 - Epson LQ-1050 Technical Manual

REV.-A

2.3.1.3 INIT Signal Input from CN1 or CN2

When the I NIT signal is input from outside (it should be low for 50 IA or more), it reduces the voltage
at the CPU and MLT terminals via the integration circuit (R89, C26, and D48), the M546 10P (5A), and
R89. When the voltage at the MLT and CPU terminals reaches
activated to set the DISC signal low. When the DISC signal goes low, the ROUT signal subsequently
goes low, and the voltage at the THLD terminal drops to
= low), and then the DISC signal goes high after the reset circuit is initialized. When the THLD terminal
voltage increases to Vp,
during this operation.
m
" N
D I SC
"p
"N
ROUT
CAR I . CAR2
+ CAR 1. cAR2
RD CLK
Fig. 2-25. INIT and A Cartridge Installed/Removed Reset Timing
ROUT signal goes high again. Figure 2-25 shows the timing of the signals
the
I
I
I
– – –
,
37
INPUT ~ A CARTRIDGE IS
(the pulse width should be: TR2 > INIT
V
N
- - - - - -
I
1
1 1
I
INSTALLED/ REMOVED
2-24
the reset
circuit (in the MMU) is
VN,
- - - - - - - - - - - - - -
i
I
I
\
1
A CARTRIDGE IS REMOVED /
IN STALLED
.