Nintendo DMG-01 - Game Boy Console Manual page 49

TM
Game Boy CPU Manual
Selection of the shift clock frequency of
the polynomial counter:
0000: dividing ratio of frequencies * 1/2
0001: dividing ratio of frequencies * 1/2^2
0010: dividing ratio of frequencies * 1/2^3
0011: dividing ratio of frequencies * 1/2^4
0101: dividing ratio of frequencies * 1/2^14
1110: prohibited code
1111: prohibited code
26. FF23 (NR 44)
Name
Contents - Sound Mode 4 register,
Only bit 6 can be read.
Bit 7 - Initial (when set, sound restarts)
Bit 6 - Counter/consecutive selection
Counter/consecutive Selection
by DP
:
:
:
- NR 44
counter/consecutive; inital (R/W)
0 = Regardless of the length data in NR41
sound can be produced consecutively.
1 = Sound is generated during the time
period set by the length data in NR41.
After this period the sound 4 ON flag
(bit 3 of NR52) is reset.
2.13.1. I/O Registers
:
:
:
Page 49