Nintendo DMG-01 - Game Boy Console Manual page 39

TM
Game Boy CPU Manual
6. FF06 (TMA)
Name
Contents - Timer Modulo (R/W)
7. FF07 (TAC)
Name
Contents - Timer Control (R/W)
8. FF0F (IF)
Name
Contents - Interrupt Flag (R/W)
The priority and jump address for the above 5
by DP
- TMA
When the TIMA overflows, this data will
be loaded.
- TAC
Bit 2 - Timer Stop
0: Stop Timer
1: Start Timer
Bits 1+0 - Input Clock Select
00: 4.096 KHz
01: 262.144 Khz
10: 65.536 KHz
11: 16.384 KHz
- IF
Bit 4: Transition from High to Low of Pin
number P10-P13
Bit 3: Serial I/O transfer complete
Bit 2: Timer Overflow
Bit 1: LCDC (see STAT)
Bit 0: V-Blank
2.13.1. I/O Registers
(~4.194 KHz SGB)
(~268.4 KHz SGB)
(~67.11 KHz SGB)
(~16.78 KHz SGB)
Page 39