Intel VC820 - Desktop Board Motherboard Design Manual page 233

8 7
VRM
VRM requirements are based on VRM8.4 spec .
D
Place caps next to output FETs.
C82,C87,C107,C111 must support >6A of RMS current.
C
VID[4:0]
VID0 1
3
VID1 2
VID2 3
VID3 4
VID4
R398
VID Override Jumpers
Default JP6-JP10 OUT.
Remove RP21, R398 for VID override.
VCCVID1 VCC12 VCC5 VCC5 VCC12
B
J14
VRM8_4
A1 V5_IN0 V5_IN3 B1
A2 V5_IN1 V5_IN4 B2
A3 V5_IN2 V5_IN5 B3
A4 V12_IN0 V12_IN1 B4
A5 V12_IN2 RSV B5
A6 ISHARE OUT_EN B6
30 VID1_0R VID1_1R
A7 VID0 VID1 B7
30 VID1_2R VID1_3R
A8 VID2 VID3 B8
30 VID1_4R
A9 VID4 PWR_GOOD B9
A10 V_OUT0 GND5 B10
A11 GND0 V_OUT6 B11
A12 V_OUT1 GND6 B12
A13 GND1 V_OUT7 B13
A14 V_OUT2 GND7 B14
A15 GND2 V_OUT8 B15
A
A16 V_OUT3 GND8 B16
A17 GND3 V_OUT9 B17
A18 V_OUT4 GND9 B18
A19 GND4 V_OUT10 B19
A20 V_OUT5 GND10 B20
8 7
6
VCC5
DO3316P-102
VRM_VCC5
1 1 1
2 2 2
RP21
8
7
6
5
0K
0K
JP6 JP8 JP10 JP7 JP9
VCCVID1
VCC3_3 VCC3_3
30
30
VRM1_PWRGD 33
6
5 4
VCC12
PVCC_R
1
2
1 1
2 2
1
2
VR3 VRM_IMAX
OUTEN 19 7
OUTEN IMAX
VID0_R 18 13
VID0 PWRGD
VID1_R 17 12
VID1 FAULT#
VID2_R 16 20
VID2 G1
VID3_R 15 8
VID3 IFB
VID4_R 14 1
VID4 G2
11
VFB
LTC1753
VRM_COMP
RP24
VID1[4:0]
VID1[0] 1 8
5
VID1[1] 2 7
VID1[2] 3 6
VID1[3] 4 5
0K
VID1[4] 0K
R104
VID Override Jumpers
Default JP16, JP27-JP30 OUT.
Remove RP24, R104 for VID override.
5 4
3 2
VCC3_3 VCC5
VRM_PWRGD
5 6 7 8 5
VRM_FAULT
4 3 2 1 4
VRM_G1
R65
VRM_IFB
VRM_G2 20
5 6 7 8 5 6 7 8
4 3 2 1 4
1 1 1 1
2 2 2 2
Sanyo 4SP2200M
VID1_0R 30
VID1_1R 30
VID1_2R 30
VID1_3R 30
VID1_4R 30
JP16 JP27 JP29 JP28 JP30
TITLE: INTEL(R) 820 CHIPSET DUAL PROCESSOR CUSTOMER REFERENCE BOARD
VRM
PCD PLATFORM DESIGN
R
1900 PRAIRIE CITY ROAD
FOLSOM, CALIFORNIA 95630
3 2
1
D
33
C118, C119 must be next to FETs.
6 7 8
1
2
VCCVID
C
3 2 1
L18
IFB_Q
1.0UH-20A
ETQP6F0R8L
1
2
3 2 1
B
A
REV:
3.03
DRAWN BY: PROJECT:
LAST REVISED: SHEET:
11-29-1999_14:46 30 OF 38
1