Chipset Configuration Submenu - Intel D845PEBT2 Product Manual

Intel Desktop Board D845PEBT2 Product Guide

Chipset Configuration Submenu

Maintenance
The menu shown in Table 22 is used to configure advanced chipset features.
Table 22. Chipset Configuration Submenu
Feature
ISA Enable Bit
PCI Latency Timer
Extended Configuration
SDRAM Frequency
SDRAM Timing Control
SDRAM RAS Act. To Pre. • 8
SDRAM CAS# Latency
SDRAM RAS# to CAS#
delay
SDRAM RAS# Precharge
68
Main Advanced
Chipset Configuration
Options
• Enabled (default)
• Disabled
• 32 (default)
• 64
• 96
• 128
• 160
• 192
• 224
• 248
• Default (default)
• User Defined
• Auto (default)
• 200 MHz
• 266 MHz
• 333 MHz
• Auto (default)
• Manual – Aggressive
• Manual – User Defined
• 7
• 6
• 5
• Auto (default)
• 2.5
• 2
• Auto (default)
• 4
• 3
• 2
• Auto (default)
• 4
• 3
• 2
• Auto (default)
Security Power
Description
Some older expansion devices require this to be
enabled.
Set PCI latency time.
Chooses the default or user defined settings for
the extended configuration options.
Allows override of detected memory frequency
value.
Auto allows timings to be programmed according
to the memory detected.
Manual – Aggressive selects the most aggressive
user defined timings.
Manual – User Defined allows manual override of
detected SDRAM settings.
Selects length of time from read to pre-change.
Selects the number of clock cycles required to
address a column in memory.
Selects the number of clock cycles between
addressing a row and addressing a column.
Selects the length of time required before
accessing a new row.
Boot Exit