Apc Circuit; 144 Mhz Signal; 50 Mhz Signal; 28 Mhz Signal - Yaesu FT-8900R Technical Supplement

Quasd band fm transceiver
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Q1134 (RD70HVF1), providing up to 35 Watts of power
output. These three stages of the power amplifier's gain
are controlled by the APC circuit.
The 35-Watt RF signal is passed through a high-pass filter
network to the antenna switch D1102, D1104, and D1146
(all UM9957F), then passed through a low-pass filter net-
work and another high-pass filter network to the ANT
jack.

144 MHz Signal

The adjusted speech signal from Q1054 is passed through
the transistor switch Q1051 (BU4066BCFV) to varactor
diodes D1076 and D1077 (both HVC365), which frequen-
cy modulate the transmitting VCO, made up of VHF-VCO/
B Q1109 (2SC5374) and D1078 (HSC277).
The modulated transmit signal is passed through buffer
amplifiers Q1100 and Q1111 (both 2SC5374) and diode
switches D1075 (HSC277) and D1128 (DAN235E) to the
pre-drive amplifier Q1139 (2SK2596).
The amplified transmit signal from Q1139 is passed
through the diode switch D1139/D1140 (both HSC277)
and the driver amplifier Q1137 (2SK2975) to diode switch
D1133 (RLS135), then finally amplified by power ampli-
fier Q1134 (RD70HVF1) up to 50 Watts of power output.
These three stages of the power amplifier's gain are con-
trolled by the APC circuit.
The 50-Watt RF signal is passed through a low-pass filter
network to the antenna switching relay RL1001 (G5A-
237P), then passed through a high-pass filter network and
another low-pass filter network to the ANT jack.

50 MHz Signal

The adjusted speech signal from Q1054 is passed through
transistor switch Q1086 (BU4066BCFV) to varactor di-
ode D1093 (HVC300A), which frequency modulates the
transmitting VCO, made up of TX50-29-VCO Q1118
(2SC5374) and D1094 (HSC277).
The modulated transmit signal is passed through buffer
amplifier Q1119 (2SC5374) to the pre-Drive amplifier
Q1123 (2SC5374).
The amplified transmit signal from Q1123 is passed
through diode switches D1127 (DAN235E) and D1141
(HSC277) and driver amplifier Q1137 (2SK2975) to di-
ode switch D1132 (D1F20), then finally amplified by pow-
er amplifier Q1134 (RD70HVF1) up to 50 Watts of power
output. These three stages of the power amplifier's gain
are controlled by the APC circuit.
The 50-Watt RF signal is passed through antenna switch-
ing relay RL1002 (G5A-237P) to a low-pass filter network,
then passed through antenna switching relay RL1003
(G5A-237P) and another low-pass filter network to the
ANT jack.
Circuit Description

28 MHz Signal

The adjusted speech signal from Q1054 is passed through
transistor switch Q1086 (BU4066BCFV) to varactor di-
ode D1093 (HVC300A), which frequency modulates the
transmitting VCO, made up of TX50-29-VCO Q1118
(2SC5374) and D1094 (HSC277).
The modulated transmit signal is passed through buffer
amplifier Q1119 (2SC5374) to the pre-Drive amplifier
Q1123 (2SC5374).
The amplified transmit signal from Q1123 is passed
through diode switches D1127 (DAN235E) and D1142
(HSC277) and driver amplifier Q1137 (2SK2975) to di-
ode switch D1132 (D1F20), then finally amplified by pow-
er amplifier Q1134 (RD70HVF1) up to 50 Watts of output
power. There three stages of the power amplifier's gain
are controlled by the APC circuit.
The 50-Watt RF signal is passed through antenna switch-
ing relay RL1002 (G5A-237P) to a low-pass filter network,
then passed through antenna switching relay RL1003
(G5A-237P) and another low-pass filter network to the
ANT jack.
APC (Automatic Power Control) Circuit
430 MHz
A portion of the power amplifier output is rectified by
D1103 and D1105 (both MA2S728) then delivered to APC
Q1130 (NJM2904V), as a DC voltage which is proportional
to the output level of the power amplifier.
At Q1130, the rectified DC voltage from the power am-
plifier is compared to the reference voltage from the main
CPU Q1084 to produce a control voltage, which regulates
the supply voltage to the pre-drive amplifier Q1139
(2SK5396), driver amplifier Q1137 (2SK2975), and pow-
er amplifier Q1134 (RD70HVF1), so as to maintain stable
output power under varying antenna loading conditions.
144 MHz
A portion of the power amplifier output is rectified by
D1114 and D1115 (both MA2S728) then delivered to APC
Q1130 (NJM2904V), as a DC voltage which is proportional
to the output level of the power amplifier.
At Q1130, the rectified DC voltage from the power am-
plifier is compared to the reference voltage from the main
CPU Q1084 to produce a control voltage, which regulates
the supply voltage to the pre-drive amplifier Q1139
(2SK5396), driver amplifier Q1137 (2SK2975), and pow-
er amplifier Q1134 (RD70HVF1), so as to maintain stable
output power under varying antenna loading conditions.
50 MHz
A portion of the power amplifier output is rectified by
D1119 and D1121 (both MA2S728) then delivered to APC
7

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