Circuit Description - Yaesu FT-902DM Instruction Manual

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CIRCUIT DESCRIPTION
This transceiver utilizes PLL (Phase Locked Loop)
'circuitry.
The receiver is a single-conversion
type
with a 8.9875
MHz IF. The following circuit des-
cription is tailored to the full-feature FT-902DM,
and some
of the features and circuitry described
below
are
optional
on
the
FT-902D/SD/DE
models.
RECEIVER
The RF input signal from the antenna is fed to pin
3 of the RF
UNIT (PB-2154)
via antenna relay
RL2, line fuse FH: ; attenuator switch S2103, input
transformer T; , and 9 MHz trap coil T2402.
RO.
12
pe
007
S53
RE UNIT (PB-2154)
The incoming signal is amplified by the RF ampli-
fier Qio1 (3SK51-03), a dual gate MOSFET which
has
superior
rejection
against
cross
modulation.
The amplified signal is then fed to the first mixer
Qio2
(ND487C2-3R),
a Schottky-barrier
double-
balanced mixer, for excellent intercept character-
istics. The RF signal is mixed
with a local signal
delivered
from
the LOCAL
UNIT, resulting in a
8.9875 MHz first IF. The IF signal is then ampli-
fied by Qio3 (J310) and delivered to the FILTER
UNIT.
The
input
and
output
of the RF
amplifier are
permeability
tuned
circuits,
resulting
in
high
sensitivity
with
excellent
rejection
of unwanted
out-of-band signals.
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