Schematic And Layout Checklist; Component Checklist - Texas Instruments DP83867 Troubleshooting Manual

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Troubleshooting the Application
Repeating this process for any values distinct from the expected values shown in
exact state of the PHY for any encountered issues.
For information about reading and writing registers using the USB-2-MDIO interface, refer to the

2.2 Schematic and Layout Checklist

Reference and verify all of the noted schematic and layout recommendations in the following spreadsheet:
DP83867 Schematic Checklist
DP83867 Layout Checklist

2.3 Component Checklist

2.3.1 Magnetics
The following guidelines are the main specifications to reference for compatible magnetics:
PARAMETER
Turns Ratio
Open Circuit Inductance
Insertion Loss
Return Loss
Differential to Common Mode Rejection Ratio
Crosstalk
Isolation
If these exact requirements cannot be met, the following allowances can be made:
Turns ratio
– 2% preferred, but 3% is tolerable.
Inductance
– High inductance is preferred. Usual numbers seen are around 350μH.
Insertion loss
– As close to 0dB as possible compared to specified value for each range stated in data sheet. If
specification gives -1dB as typical. finding a component with -1dB, -0.9dB, ... is recommended.
Return loss
– At or lower than the magnitude specified in data sheet. If specification gives -16dB as typical, finding a
component with -16dB, -17dB, ... is recommended.
4
DP83867 Troubleshooting Guide
Table 2-2. Magnetic Isolation Requirements
TEST CONDITIONS
±2% Tolerance
1-100MHz
1-30MHz
30-60MHz
60-100MHz
1-50MHz
50-150MHz
30MHz
60MHz
Copyright © 2024 Texas Instruments Incorporated
Table 2-1
-
HPOT
SNLA246C – OCTOBER 2015 – REVISED APRIL 2024
www.ti.com
help diagnose the
Section
3.8.
TYP
UNIT
1:1
-
320 to 350
µH
-1
dB
-16
dB
-12
dB
-10
dB
-30
dB
-20
dB
-35
dB
-30
dB
1500
Vrms
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