Schematic, Pcb Layout, And Bill Of Materials; Evm Schematic; Opa462Evm Schematic - Texas Instruments OPA462 User Manual

www.ti.com
4

Schematic, PCB Layout, and Bill of Materials

This section discusses the OPA462EVM hardware schematics, PCB layout and jumper configurations.
4.1

EVM Schematic

Figure 4 depicts the complete OPA46xEVM schematic.
J1
TP3 TP T T 3 TP4 T T 4 TP
J7
Ext
GND
-In Select
J10
Ext
GND
+In Select
Input Protection
R13
A
0
3 3
7 7
R1
B
0
SBOU175 – October 2019
Submit Documentation Feedback
Op Amp Supplies and Bulk Decoupling
J2
V+ V+
Powe Power Supply w w r Supply
Minimum: 12V (+/-6V) Minimum: 12V (+/-6V)
T T 1 TP TP1
V+ V+
Maxi x x mum: 180V (+/-90V) Maximum: 180V (+/-90V)
D1
C1 C1
C2 C3
0.1uF 0.1uF
T T 16 TP TP16 T T 5 TP TP5 TP TP6 T T 6
90V
10uF 10uF
C4 C4
C5 C6
D2 GND GND
0.1uF 0.1uF
10uF 10uF
TP9 TP T T 9
90V
GND GND V- V-
J5 J5
J6
2
3
-In
4
5
TP12
GND
1
R4
2
3
10k
J9
2 GND
3
+In
4
C12 Cng
5
TP14 Input Protection
R5 Rng
GND A C C
1
R8
B D D
2
3 0
C14
GND
GND
C
R12 Rref
C17
Q Q A Q2 Q2A
2 2 2 2 3 3
Q1A Q1A
C18
GND
Int
6 6
Q Q B Q2 Q2B
6 6 7 7
Q1B Q1B VREF Select
D
Figure 4. OPA462EVM Schematic
Copyright © 2019, Texas Instruments Incorporated
Enable/Disable Configuration
E/D EXT E/D EXT
E/D Com E/D Com E/D E/D
T T 10 TP TP10
V- V-
C7 C7
GND GND
0.1uF 0.1uF
J3 J3 J4 J4
GND GND
C9
R3
100k
C10
V+
V+
C11
0.1uF
D3
SF E/D GND
OPA462IDDAR
2
U1 0 0
V+
6
3
V - R6 Riso R7 Rhcp
E/D Com
C15
D4
0.1uF
GND
V-
V-
R11
Rf+
TP15
VREF Ext
J12
Ext
Schematic, PCB Layout, and Bill of Materials
SF Pull-Up p
SF EXT SF EXT
SF SF
SF SF
TP11 T T P T T 11
TP2 TP T T 2
E/D Com
R2
100k
C8 C8
0.1uF 0.1uF
GND GND
J8
2
3
Vout
4
5
TP13
GND
J11
1
2
CL C13 Vout
RL R9
Rsn R10
GND
GND GND
C16
Csn
GND
9
OPA462EVM