Ddr4 Chb So-Dimm - Clevo P955HQ3 Service Manual

Table of Contents

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DDR4 CHB SO-DIMM_0

5
Channel B SO-DIMM 0[RAM2]
D
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM
DDR4_DRAMRST#
9,33
DDR4_DRAMRST#
PLACE THE CAP CLOSE TO SODIMM
DDR_VREFCA_CHB_DIMM
VDDQ
C
C409
C408
0.1u_10V_X7R_04
*2.2u_6.3V_X5R_04
2DIMM
R243
240_1%_04
2DIMM
32
DIMM1_CHA_EVENT#
2.5V
C319
C298
10u_6.3V_X5R_06
1u_6.3V_X5R_04
2DIMM
2DIMM
VTT_MEM
B
C333
C332
10u_6.3V_X5R_06
1u_6.3V_X5R_04
2DIMM
2DIMM
VDDQ
C377
C351
C335
C393
C398
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
2DIMM
2DIMM
2DIMM
2DIMM
2DIMM
VDDQ
C326
C365
C324
C355
C382
A
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
2DIMM
2DIMM
2DIMM
2DIMM
2DIMM
5
4
3
RSV TYPE
H=4mm
J_DIMMB_1A
137
8
M_B_DQ0
4
M_B_CLK_DDR0
CK0_T
DQ0
M_B_DQ5
139
7
4
M_B_CLK_DDR#0
CK0_C
DQ1
138
20
M_B_DQ7
4
M_B_CLK_DDR1
CK1_T
DQ2
140
21
M_B_DQ3
4
M_B_CLK_DDR#1
CK1_C
DQ3
4
M_B_DQ4
DQ4
M_B_DQ2
109
3
4
M_B_CKE0
CKE0
DQ5
110
16
M_B_DQ1
4
M_B_CKE1
CKE1
DQ6
17
M_B_DQ6
DQ7
149
28
M_B_DQ9
4
M_B_CS#0
S0*
DQ8
M_B_DQ14
157
29
4
M_B_CS#1
S1*
DQ9
41
M_B_DQ13
DQ10
155
42
M_B_DQ15
4
M_B_ODT0
ODT0
DQ11
161
24
M_B_DQ8
4
M_B_ODT1
ODT1
DQ12
M_B_DQ10
25
DQ13
115
38
M_B_DQ11
4
M_B_BG0
BG0
DQ14
113
37
M_B_DQ12
4
M_B_BG1
BG1
DQ15
150
50
M_B_DQ16
4
M_B_BA0
BA0
DQ16
M_B_DQ18
145
49
4
M_B_BA1
BA1
DQ17
62
M_B_DQ21
DQ18
144
63
M_B_DQ19
4
M_B_A0
A0
DQ19
133
46
M_B_DQ17
4
M_B_A1
A1
DQ20
M_B_DQ22
132
45
4
M_B_A2
A2
DQ21
M_B_DQ23
131
58
4
M_B_A3
A3
DQ22
128
59
M_B_DQ20
4
M_B_A4
A4
DQ23
126
70
M_B_DQ25
4
M_B_A5
A5
DQ24
M_B_DQ31
127
71
4
M_B_A6
A6
DQ25
M_B_DQ24
122
83
4
M_B_A7
A7
DQ26
125
84
M_B_DQ29
4
M_B_A8
A8
DQ27
121
66
M_B_DQ28
4
M_B_A9
A9
DQ28
146
67
M_B_DQ27
4
M_B_A10
A10_AP
DQ29
M_B_DQ30
120
79
4
M_B_A11
A11
DQ30
119
80
M_B_DQ26
4
M_B_A12
A12
DQ31
158
174
M_B_DQ39
4
M_B_A13
A13
DQ32
151
173
M_B_DQ35
4
M_B_W E#
A14_WE*
DQ33
M_B_DQ32
156
187
4
M_B_CAS#
A15_CAS*
DQ34
152
186
M_B_DQ37
4
M_B_RAS#
A16_RAS*
DQ35
170
M_B_DQ34
DQ36
169
M_B_DQ38
DQ37
M_B_DQ33
114
183
4
M_B_ACT#
ACT*
DQ38
182
M_B_DQ36
DQ39
143
195
M_B_DQ41
4
DDR1_B_PARITY
PARITY
DQ40
116
194
M_B_DQ45
4
DDR1_B_ALERT#
ALERT*
DQ41
M_B_DQ46
134
207
EVENT*
DQ42
DDR4_DRAMRST#
108
208
M_B_DQ43
RESET*
DQ43
191
M_B_DQ40
DQ44
DDR_VREFCA_CHB_DIMM
164
190
M_B_DQ44
VREFCA
DQ45
M_B_DQ42
203
DQ46
254
204
M_B_DQ47
9,33
SMB_DATA_R
SDA
DQ47
253
216
M_B_DQ55
9,33
SMB_CLK_R
SCL
DQ48
215
M_B_DQ48
010
DQ49
M_B_DQ49
166
228
SA2
DQ50
M_B_DQ51
260
229
3.3VS
SA1
DQ51
256
211
M_B_DQ52
SA0
DQ52
212
M_B_DQ54
DQ53
M_B_DQ53
CHA_DIMM0=000
224
DQ54
M_B_DQ50
225
CHA_DIMM1=001
DQ55
92
237
M_B_DQ61
CB0_NC
DQ56
91
236
M_B_DQ62
CHB_DIMM0=010
CB1_NC
DQ57
101
249
M_B_DQ60
CB2_NC
DQ58
CHB_DIMM1=011
M_B_DQ58
105
250
CB3_NC
DQ59
88
232
M_B_DQ59
CB4_NC
DQ60
87
233
M_B_DQ57
CB5_NC
DQ61
100
245
M_B_DQ56
CB6_NC
DQ62
M_B_DQ63
104
246
CB7_NC
DQ63
12
13
M_B_DQS0
VDDQ
DM0*/DBI0*
DQS0_T
33
34
M_B_DQS1
DM1*/DBI1*
DQS1_T
M_B_DQS2
54
55
DM2*/DBI2*
DQS2_T
75
76
M_B_DQS3
DM3*/DBI3*
DQS3_T
178
179
M_B_DQS4
DM4*/DBI4*
DQS4_T
199
200
M_B_DQS5
DM5*/DBI5*
DQS5_T
M_B_DQS6
220
221
DM6*/DBI6*
DQS6_T
241
242
M_B_DQS7
DM7*/DBI7*
DQS7_T
96
97
DM8*/DBI8*
DQS8_T
M_B_DQS#0
11
DQS0_C
32
M_B_DQS#1
DQS1_C
C349
C346
53
M_B_DQS#2
DQS2_C
74
M_B_DQS#3
10u_6.3V_X5R_06
10u_6.3V_X5R_06
DQS3_C
M_B_DQS#4
177
2DIMM
2DIMM
DQS4_C
M_B_DQS#5
198
DQS5_C
219
M_B_DQS#6
DQS6_C
240
M_B_DQS#7
DQS7_C
95
DQS8_C
162
S2*/C0
165
S3*/C1
D4AR0-26001-1P40
C370
C375
C325
2DIMM
4
DIMM_DQ_CPU_VREF_B
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
6-86-24260-000
2DIMM
2DIMM
2DIMM
7,9,33,53,57
9,57
3,9,11,12,13,30,32,33,34,35,36,38,39,40,41,42,44,48,49,50,51,52,59
4
3
2
J_DIMMB_1B
VDDQ
VTT_MEM
13A
2A
163
258
VDD19
VTT
2.5V
160
VDD18
159
VDD17
154
259
M_B_DQ[63:0]
4
VDD16
VPP2
153
257
VDD15
VPP1
148
VDD14
147
VDD13
142
VDD12
141
VDD11
136
255
VDD10
VDDSPD
135
VDD9
130
VDD8
129
C308
VDD7
124
VDD6
123
0.1u_10V_X7R_04
VDD5
118
2DIMM
VDD4
117
VDD3
112
VDD2
111
VDD1
GND1
MT1
GND2
MT2
251
252
VSS
VSS
247
248
VSS
VSS
243
244
VSS
VSS
239
238
VSS
VSS
235
234
VSS
VSS
231
230
VSS
VSS
227
226
VSS
VSS
223
222
VSS
VSS
217
218
VSS
VSS
213
214
VSS
VSS
209
210
VSS
VSS
205
206
VSS
VSS
201
202
VSS
VSS
197
196
VSS
VSS
193
192
VSS
VSS
189
188
VSS
VSS
185
184
VSS
VSS
181
180
VSS
VSS
175
176
VSS
VSS
171
172
VSS
VSS
167
168
VSS
VSS
107
106
VSS
VSS
103
102
VSS
VSS
99
98
VSS
VSS
93
94
VSS
VSS
89
90
VSS
VSS
85
86
VSS
VSS
81
82
VSS
VSS
77
78
VSS
VSS
73
72
VSS
VSS
69
68
VSS
VSS
65
64
VSS
VSS
61
60
VSS
VSS
57
56
VSS
VSS
51
52
VSS
VSS
47
48
VSS
VSS
43
44
VSS
VSS
39
40
VSS
VSS
35
36
VSS
VSS
31
30
VSS
VSS
27
26
VSS
VSS
23
22
VSS
VSS
19
18
VSS
VSS
15
14
VSS
VSS
9
10
M_B_DQS[3:0]
4
VSS
VSS
5
6
VSS
VSS
1
2
VSS
VSS
M_B_DQS[7:4]
4
D4AR0-26001-1P40
VDDQ
2DIMM
M_B_DQS#[3:0]
4
C367
R237
10u_6.3V_X5R_06
1K_1%_04
2DIMM
M_B_DQS#[7:4]
4
2DIMM
DIMM
C433
0.1u_10V_X7R_04
R236
DDR_VREFCA_CHB_DIMM
2DIMM
1K_1%_04
C435
2DIMM
*0.1u_10V_X7R_04
2DIMM
R251
1.8_1%_04
2DIMM
C432
0.022u_16V_X7R_04
2DIMM
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
! ! ! !!DMFWP!DP/
R235
24.9_1%_04
Title
Title
Title
[10] DDR4 CHB SO-DIMM_0
[10] DDR4 CHB SO-DIMM_0
[10] DDR4 CHB SO-DIMM_0
2DIMM
9,53
2.5V
VDDQ
Size
Size
Size
Document Number
Document Number
Document Number
VTT_MEM
6-71-P9500-D03
6-71-P9500-D03
6-71-P9500-D03
A3
A3
A3
P955HQx
P955HQx
P955HQx
3.3VS
Date:
Date:
Date:
Friday, June 23, 2017
Friday, June 23, 2017
Friday, June 23, 2017
2
Schematic Diagrams
1
3.3VS
D
C307
2.2u_6.3V_X5R_04
2DIMM
PLACE NEAR TO PIN
Sheet 10 of 74
C
DDR4 CHB SO-
DIMM_0
B
A
Rev
Rev
Rev
D03
D03
D03
Sheet
Sheet
Sheet
10
10
10
of
of
of
74
74
74
1
DDR4 CHB SO-DIMM_0 B - 11

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