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HDMI, CRT
HDMI PORT
FOR INTEL GRAPHIC
U5
39
C141
0.1u_10V_X7R_04
HD MIB_D2BP
16
H DMIB_D2BP_C
38
IN _D1+
C140
0.1u_10V_X7R_04
HD MIB_D2BN
16
H DMIB_D2BN_C
IN _D1-
42
C125
0.1u_10V_X7R_04
HD MIB_D1BP
16
H DMIB_D1BP_C
IN _D2+
C124
0.1u_10V_X7R_04
HD MIB_D1BN
41
16
H DMIB_D1BN_C
IN _D2-
C127
0.1u_10V_X7R_04
HD MIB_D0BP
45
16
H DMIB_D0BP_C
IN _D3+
C126
0.1u_10V_X7R_04
HD MIB_D0BN
44
16
H DMIB_D0BN_C
IN _D3-
HD MIB_CLKBP
48
C138
0.1u_10V_X7R_04
16
H DMIB_CLKBP_C
HD MIB_CLKBN
47
IN _D4+
C137
0.1u_10V_X7R_04
16
H DMIB_CLKBN_C
IN _D4-
R803
* 2.2K_04
9
HD MI_CTRLCLK
16
HDMI_CTRLC LK
8
SCL
HD MI_CTRLDATA
16
HDMI_CTRLD ATA
SDA
7
PORTC_H PD
16
POR TC_HPD
HPD/HPDX
R68
*0_04
OE#
25
OE#
DC C_EN#
32
3.3VS
R54
*4.7K_04
DCC_EN #
C675
*2.2u_6.3V_X5R_06
CEXT
10
CEXT/RT_EN#
PEQ
3
Parade PS8171
4
PEQ/PC0
PIO
6
PIO/PC1
R396
*499_1%_04
REXT
3.3VS
R777
*4.7K_04
DDCBUF
34
DDCBUF/OE_1
R776
*4.7K_04
PRE
35
PRE/QE_2
R778
*4.7K_04
ASQ0
1
R779
*4.7K_04
ASQ0/GND [1]
APD
11
APD/VCC[2]
ASQ1
12
R780
*4.7K_04
3.3VS
EMI0
27
ASQ1/GND [3]
EMI1
33
EMI0/GND[6]
R805
*0_04
EMI1/VCC[6]
* PS8171
P IN 4 9 =G N D
R781
*4.7K_04
PEQ
R782
*4.7K_04
PIO
R783
*4.7K_04
3.3VS
R784
*4.7K_04
APD
R785
*4.7K_04
R786
*4.7K_04
R787
*4.7K_04
EMI0
R788
*4.7K_04
R789
*4.7K_04
EMI1
R790
*4.7K_04
HPDX: Output level and polarity of HPD is defined by PIO
APD: Automatic power down managementl, 3 level CMOS input,
PIO=LOW:
HPD=HPD_SINK@3.3V CMOS output
internal pull-up at ~ 500k ohm
PIO=High: HPD=HPD_SINK#(inverted HPD)@0.9V
APD=LOW: Automatic power down disable
PIO: Internal pull down ~ 500k ohm
APD=High: Automatic power down enable
PEQ: TMDS iutput equalization control, 3 level CMOS input,
APD=MID: Reserved
internal pull-down at ~ 500k ohm
EMI0,EMI1: EMI reduction and filter setting, 3 level CMOS input,
PEQ=LOW: Mid level EQ(Default)
EMI1 internal pull-up at ~ 500k ohm
PEQ=High: High level EQ
EMI0 internal pull-down at ~ 500k ohm
PEQ=MID: Low level EQ
[EMI1,EMI0]=HL: No EMI reduction
PRE: TMDS output driver pre-emphasis level setting,
EMI0=High: Increased rise/fall time
3 level CMOS input, internal pull-down at ~ 500k ohm
MID, Increased rise/fall time,2nd
PRE=LOW: No pre-emphasis
EMI1=LOW: EMI filter setting 1
MID: Reserved
3.3VS
5VS_CRT
CRT PORT
RN1
2.2K_8P4R_04
U 33
10
16
DAC_DDCADATA
DDC_IN1
DDC_OU T1
11
16
DAC_DDCACLK
DDC_IN2
DDC_OU T2
13
16
DAC_H SY NC
SY NC_IN1
SY NC_OU T1
15
16
DAC_VSY NC
SY NC_IN2
SY NC_OU T2
1
5VS_CRT
VCC_SYNC
VIDEO_1
2
3.3VS
VCC_VID EO
VIDEO_2
7
3.3VS
VCC_D DC
VIDEO_3
8
BY P
TPD7S019
W/O level shift
22
HDMIB_DATA2P
OUT_D 1+
23
HDMIB_DATA2N
HDMI_CTRLCLK
OUT_D1-
19
HDMIB_DATA1P
OUT_D 2+
20
HDMIB_DATA1N
OUT_D2-
HDMI_CTRLDATA
16
HDMIB_DATA0P
OUT_D 3+
17
HDMIB_DATA0N
OUT_D3-
13
HDMIB_CLOCKP
PORTC _HPD
OUT_D 4+
14
HDMIB_CLOCKN
W/
level shift: 100K
OUT_D4-
28
HDMIB_EXT1_SCL
W/O level shift: 20K
SC L_SINK
29
HDMIB_EXT1_SDA
SDA_SINK
30
HDMI_HPD-C
R55
20K_1%_04
HPD_SINK
2
VCC [1]
3.3VS
15
C338
C339
VCC [3]
21
VCC [4]
26
*0.1u_16V_Y 5V_04
* 0.1u_16V_Y 5V_04
VCC [5]
40
VCC [7]
46
VCC [8]
5
GND [2]
C31
C340
18
GND [4]
*0.1u_16V_Y 5V_04
* 0.1u_16V_Y 5V_04
24
GND [5]
31
GND [7]
36
GND [8]
37
GND [9]
43
C30
GND[10]
*0.1u_16V_Y 5V_04
*0_8P4R_04_SHORT
R804
CEXT
R N20
RN 21
3.3VS
*0_8P4R _04_SHORT
5
4
5
4
*4.7K_04
H DMIB_D1BP
HDMIB_D1BP_M
HDMIB_D ATA1P
6
3
6
3
H DMIB_D1BN
HDMIB_D1BN_M
HDMIB_D ATA1N
H DMIB_D2BP
7
2
HDMIB_D2BP_M
7
2
HDMIB_D ATA2P
H DMIB_D2BN
8
1
HDMIB_D2BN_M
8
1
HDMIB_D ATA2N
H DMIB_CLKBP
5
4
HDMIB_CLKBP_M
5
4
HDMIB_C LOCKP
H DMIB_CLKBN
6
3
HDMIB_CLKBN_M
6
3
HDMIB_C LOCKN
H DMIB_D0BP
7
2
HDMIB_D0BP_M
7
2
HDMIB_D ATA0P
H DMIB_D0BN
8
1
HDMIB_D0BN_M
8
1
HDMIB_D ATA0N
*0_8P4R_04_SHORT
*0_8P4R_04_SHORT
RN22
RN 23
3.3VS
W/O level shift
S
Q56
MTN7002ZHS3
DDCBUF: DDC Active Buffer enable and setting, 3 level CMOS input,
internal pull-down at ~ 500k ohm
DDCBUF=LOW:
No DDC active buffer, passive DDC level shifting
DDCBUF=High: Active DDC bufer enable, setting 1
DDCBUF=MID:
Active DDC bufer enable, setting 2
5VS
D26
C
A
16
DAC_RED
16
DAC_GREEN
16
DAC_BLUE
RB751S-40C2
9
DDCD ATA
12
DDCLK
14
CRT_H SY NC
HSY N C
R372
33_04
16
CRT_VSY NC
VSY NC
R373
33_04
3
BLU E
4
GRN
5
RED
6
GND
3.3VS
5VS_HDMI
R656
2.2K_04
R657
2.2K_04
R658
1M_04
Q53
R403
R404
MTN7002ZHS3
S
D
HD MIB_EXT1_SCL
Q54
MTN 7002ZHS3
S
D
HD MIB_EXT1_SDA
HDMIB_EXT1_SCL
Q55
HDMIB_EXT1_SDA
MTN7002ZHS3
S
D
HD MI_HPD-C
HDMI_HPD-C
HDMIB_C LOCKP
HDMIB_C LOCKN
5VS_HDMI
D30
5VS
RB551V-30S2
5VS_HDMI_IN
C
A
R401
1_04
HDMIB_D ATA1P
J_HDMI1
HDMIB_D ATA1N
C348
C349
10u_10V_Y 5V_08
10u_10V_Y 5V_08
19
HDMI_HPD-C
H OT PLUG DETECT
18
+5V
17
DDC/CEC GND
HDMIB_EXT1_SDA
16
SD A
15
HDMIB_EXT1_SCL
SCL
14
RESERVED
13
HDMI_CEC
12
CEC
TMDS_CLOCK#
TMDS CLOCK-
11
10
C LK SHIELD
TMDS_CLOCK
TMDS CLOCK+
9
TMDS_DATA0#
TMDS DATA0-
8
SH IELD 0
7
TMDS_DATA0
TMDS DATA0+
TMDS_DATA1#
6
TMDS DATA1-
5
SHIELD1
TMDS_DATA1
4
TMDS DATA1+
3
TMDS_DATA2#
TMDS DATA2-
2
SH IELD 2
1
TMDS_DATA2
TMDS DATA2+
D
HMD I_IN TEL
C12817-119A5-L
HMDI_INTEL
W/O level shift
J_CR T1
6-19-31001-264
108AH15FST04A1CC
1
RED
9
2
L7
0_04
L8
FCM1005MF-600T01
10
L6
0_04
L5
FCM1005MF-600T01
GRN
L4
0_04
L3
FCM1005MF-600T01
BLUE
3
11
4
12
5
13
6
14
7
15
8
3,9,10,11,13,14,15,16,17,18,19,20,23,24,25,27,28,29,30,31,36
3.3VS
11,13,19,20,25,29,30,31,36,37
5VS
Schematic Diagrams
For ESD
RD3
RD2
RD1
*BAV99 RECTIFIER
*BAV99 RECTIFIER
*BAV99 RECTIFIER
R730
*20m il_04
TMDS_C LOCK
R731
*20m il_04
TMDS_C LOCK#
Sheet 12 of 43
TMDS_D ATA1
R732
*20m il_04
HDMI, CRT
TMDS_D ATA1#
R733
*20m il_04
R734
*20m il_04
HDMIB_DATA0N
R735
*20m il_04
HDMIB_DATA0P
HDMIB_DATA2N
R736
*20m il_04
HDMIB_DATA2P
R737
*20m il_04
6-20-14X30-015
DDCDATA
HSY N C
VSY N C
DDCLK
HDMI, CRT B - 13
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