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CIRCUIT DESCRIPTION
CIRCUIT DESCRIPTION
8-2. Explanation of terminals
Function
Address output of external RAM.
ADORO7
vo
ce)
ce)
fo)
ie)
fe)
ce)
ON/OFF contro! output of spindle motor
Address output of external RAM.
ADDRO9
Address output of external RAM.
ADDR10
Address output of external RAM.
ADDR 11 (MSB)
Write Enable signal output to external RAM.
(Active at ''L"')
Drive output of spindle motor
Rough
speed control
in CLV-S
mode
and phase control
in CLV-P mode
Orive output of spindle motor.
Speed control in CLV-P mode
EFM signat input from RF amplifier
Output for controlling the slice tevei of EFM signat
Chip select signat output to external RAM.
(Active at ''L"")
Crystal dividing output.
f= 4 2336 MHz
+
+
Samples the GFS signal with WFCK/16, and outputs ''H'' when the level is high
When itis ''L'' for eight times, in arrow, outputs ""L"'
VCO output.
f= 8 6436 MHz when locked to EFM signal
-
GND (0 V)
VCO input
XTAI
i |
Crystal oscillator input. f= 8 4672 MHz or 16.9344 MHz depending on the mode selected
Phase comparison output of EFM signal and VCO/2
GND (0 V)
Serial data transmission clock input from CPU
Data 's latched at rising edge of a clock
|
Mode select input 1
!
Mode select input 2
|
Mode select input 3
Latch input from CPU.
Data (serial data from CPU} from the 8 bit shift register 1s jatched in each register
Serial data input from CPU
I
Audio
data output mode
select input.
Serial output when
*'L"', parallel output when
''H''
System reset input.
Reset at ''L"*
Aperture compensation control output.
"'H'' when R-ch
Input of tracking pulse
Aperture compensation control output.
''H'' when L-ch
DAO! (paratlel audio data LSB) output when PSSL =''H'', CIF? output when PSSL = "'L"'
DAO2
DAO2 output when PSSL = ""H", C1F2 output when PSSL =U'
DAO3 output when PSSL = ''H'', C2F1 output when PSSL = "'L"*
DAO4 output when PSSL = ''H'', C2F2 output when PSSL = ''L
DAOS5 output when PSSL = ''H'', C2FL output when PSSL = "'L""
Output of internal status in correspondence
to the address
Muting input. In the case when ATTM of internal register A is "'L"'
Normal status when MUTG is "'L'' or soundiess state when it is ""H™"
Output of result of CRC check of sub code Q
Clock input for sub code serial output
Sub code serial output
Sub code Q output
DAO7 output when PSSL =''H'', RFCK output when PSSL = 'L"
Sub code sync SO +S1 output
a
see
at
WEE
a
output
when
ae
ule
output when
aL.
SQCK
Sub code O read-otf ciock
piconet
=
coeliac a
DAO9 output when PSSL = °'H'', PLCK output when PSSL = "'L"'
soc sence
DA10
PSS
H'.
UGFS
PSSL
10 output
whi
b=
H",
output
when
ad Bd
DIGITAL OUT output (Outputs the WFCK signat when CXO11300 or DO 's off)
utout when
utpu
72
DAII
DA11
output when PSSL="'H'', GTOP output when PSSL = ''L''
Display output of frame
sync
lock status
;
fe
.
-
h
Data pin of external RAM DATA8 {MSB)
3
Voo
|
ower supply (+5 V}
74
1
="H"
nen
PSSL="'L"
Data pin of external RAM. OATA7
DAI2
OF | DA12
output when PSSL
=°'H'', RAOV output when
PSSL = "'L
="H"
hn
Pier he
Data pin of external RAM. OATA6
75
i
DAI3
ie]
DA13 output when PSSL = "'H'', C4LR output when PSSL
L
4
=H"
hen
P.
au
Data pin of external RAM.
DATAS
76
DA14
ie)
DA14
output when PSSL
, C210 output when
PSSL = "'L
77
DA15
fo)
0A15 output when PSSL = ''H'', C210 output when PSSL="'L"'
Power supply (+5 V)
-
PSSL="'H"
=U"
Data pin of external RAM. DATA4
DAI16
°
[oat6 {parallel audio data MSB) output when
PSSi =
, DATA output when
PSSL
WODCK
ie)
Strobe signal output.
176.4 kHz when OF is ON, 88 2 kHz with €X011250 or when DF is OFF
Data pin of external RAM.
DATA3
Data pin of external RAM.
DATA2
Data pin of external RAM.
DATAT
(LS8}
Strobe signal output.
88.2 kHz when DF is ON, 44 1 kHz with CXD1125Q or when DF 1s OFF
Address output of external RAM.
ADDRO!
(LSB)
Notes:
| Address output of external RAM. ADDRO2
ae '7 Error correction status monitor output for C1 decode.
UGFS : Non-protected frame sync pattern output.
Address output of external RAM.
ADDRO3
C2F1
;
GTOP : Frame sync protect status display output.
Address output of external RAM.
ADDRO4
C2F2
'J Error correction status monitor output for C2 decode.
RAOV: Erareis jitter absorption RAM
overflow and underflow
:
ra
isplay output.
:
"H
i
Address output of external RAM. ADDROS
Cert
pokey Pan Eph aeneliny Saeed ties currently
C4LR : Strobe signal. 352.8 kHz when DF is ON, 176.4 kHz
Address output of external RAM. ADDRO6
pal
sesiatubadenan
es)
with CXD1125Q or when OF is OFF.
C2PO
: C2 pointer signal. Synchronized to the audio data output.
=aTh.
:
RFCK : Read frame clock output.
7.35 MHz when locked to the
BalOs
5210 tnere OUDUt
* crystal line
Paes
C210: Bit clack output. 4.2336 MHz when DF is ON,
WFCK: Write frame clock output. 7.35 MHz when locked to the
: 2.1188 Miz: with CAD 11250 ofan DEis OFF:
crystal line
DATA:
Audio signal serial data output.
ine.
PLCK
: VCO/2 output.
f= 4.3218 MHz
when locked to the EFM
32
signal.
33
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