Nvidia BlueField-2 User Manual page 90

Pin Signal I/O Description
# Name
13 TX_D0 Input Transmit data
14 GND GND Ground
15 TX_D1 Input Transmit data
16 GND GND Ground
17 TX_EN Input Transmit enable
18 GND GND Ground
19 NC
20 NC
Input for SoC.
Data signals from the BMC to the network controller.
For baseboards, this pin shall be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ
pull down resistor to GND on the baseboard between the RBT isolator and the DPUcable connector to prevent the card-side signals from
floating when the RBT signals are isolated.
For DPUs, this pin shall be connected between the connector and the RBT PHY. External termination determined by the DPU RBT PHY
requirements.
Input for SoC. Data signals from the BMC to the network controller.
For baseboards, this pin shall be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ
pull down resistor to GND on the baseboard between the RBT isolator and the DPUcable connector to prevent the card-side signals from
floating when the RBT signals are isolated.
For DPUs, this pin shall be connected between the connector and the RBT PHY. External termination determined by the DPU RBT PHY
requirements.
Transmit enable.
For baseboards, this pin shall be connected between the baseboard NC-SI over RBT PHY and the connector. This signal requires a 100 kΩ
pull down resistor to ground on the baseboard between the RBT isolator and the DPU cable connector to prevent the card-side signals from
floating when the RBT signals are isolated.
For DPUs, this pin shall be connected between the connector and the RBT PHY. External termination determined by the DPU RBT PHY
requirements.
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