Nvidia BlueField-2 User Manual page 18

Feature
IEEE802.3ck
IEEE 802.3cb
IEEE 802.3ap
IEEE 802.3ad
IEEE 802.1AX
IEEE 802.1Q
IEEE 802.1P VLAN tags and priority
IEEE 802.1Qau (QCN)
Congestion Notification
IEEE 802.1Qaz (ETS)
EEE 802.1Qbb (PFC)
IEEE 802.1Qbg
IEEE 1588v2
IEEE 802.1AE
Jumbo frame support (9.6KB)
Onboard Memory • Quad SPI NOR FLASH - includes 256Mbit for firmware image
• UVPS EEPROM - includes 1Mbit
• FRU EEPROM - stores the parameters and personality of the DPU. The EEPROM capacity is 128Kbit. FRU I2C address is (0x50) and is accessible through the PCIe
SMBus.
• eMMC - x8 NAND flash (memory size might vary on different DPUs) for Arm boot, OS, and disk space
• DDR4 SDRAM - 8GB/16GB/32GB @3200MT/s single-channel DDR4 SDRAM memory. Solder down on-board. 64bit + 8bit ECC.
BlueField-2 DPU The BlueField-2 DPU integrates eight 64-bit Armv8 A72 cores interconnected by a coherent mesh network, one DRAM controller, an RDMA intelligent network adapter
supporting up to 200Gb/s, an embedded PCIe switch with endpoint and root complex functionality, and up to 16 lanes of PCIe Gen 4.0.
Overlay Networks To better scale their networks, data center operators often create overlay networks that carry traffic from individual virtual machines over logical tunnels in encapsulated
formats such as NVGRE and VXLAN. While this solves network scalability issues, it hides the TCP packet from the hardware offloading engines, placing higher loads on the
host CPU. DPU effectively addresses this by providing advanced NVGRE and VXLAN hardware offloading engines that encapsulate and de-capsulate the overlay protocol.
200/100 Gigabit Ethernet
(Include ETC enhancement)
2.5/5 Gigabit Ethernet
(For 2.5: support only 2.5 x1000BASE-
X)
Based on auto-negotiation and KR
startup
Link Aggregation
Description
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