Nvidia BlueField-2 User Manual page 88

Table A - NC-SI Connector Pins
Pin Signal I/O Description
# Name
1 REF_CLK Input 50M REF CLK for
NCSI BUS
2 GND GND Ground
3 ARB_IN Input NCSI hardware
arbitration input
4 GND GND Ground
5 ARB_OUT Output NCSI hardware
arbitration
output
6 GND GND Ground
RBT Reference clock. Synchronous clock reference for receive, transmit and control interface. The clock shall have a typical frequency of
50MHz ±50 ppm.
For baseboards, this pin shall be connected between the baseboard NC-SI over RBT PHY and the DPU cable connector. The RBT_REF_CLK
shall not be driven until 3.3V AUX is present on the DPU. The RBT_REF_CLK shall be continuous once it has started. For DPUs, this pin shall
be connected between the connector and the RBT PHY. No external termination is required.
NC-SI hardware arbitration input
If the baseboard supports multiple DPU cards connected to the same RBT interface, it shall implement logic that connects the RBT_ARB_IN
pin of the first populated DPU card to its RBT_ARB_OUT pin if it is the only card present or to the RBT_ARB_OUT pin of the next populated
card and so on sequentially for all cards on the specified RBT bus to ensure the arbitration ring is complete. This logic shall bypass slots
that are not populated or powered off.
NC-SI hardware arbitration output.
If the baseboard supports multiple DPU cards connected to the same RBT interface, it shall implement logic that connects the
RBT_ARB_OUT pin of the first populated DPU card to its RBT_ARB_IN pin if it is the only card present or to the RBT_ARB_IN pin of the next
populated card and so on sequentially for all cards on the specified RBT bus to ensure the arbitration ring is complete. This logic shall
bypass slots that are not populated or powered off.
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