Chapter 3: The TI-89 / TI-92 Plus Hardware Overview
3.3.
ASIC registers
When accessing the ASIC registers, it is important to modify only the intended
bits.
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When Bit 2 is set, logic is enabled that triggers a level 7 interrupt on any write to
addresses 0xE000000 through 0xFFFFFF and 0x000000 through 0x00003FF.
This mechanism is used to detect stack overflow without the penalty of a
software stack probe.
0x600004 System sleep / wake-up — Stop the system oscillator to preserve power.
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Writing to this register will stop the system oscillator. The system oscillator is
restarted by any interrupt whose corresponding bit is set to one. Interrupts level 6
and 7 always restart the oscillator.
TI-89 / TI-92 Plus Developer Guide
0x600000 System Configuration — Detect stack overflow.
7
6
6
Table 3.3: System Configuration Register
7
6
5
System
timer
Table 3.4: System Sleep Register
Not for Distribution
4
3
Stack protect
enable.
Specify wake-up condition. Interrupt level
required for wake-up.
4
3
2
DBus IO
Not used
2
1
0
1
0
Key
Heartbeat
interrupt
timer
Beta Version January 26, 2001
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