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EXTUPDATE*
DAC OUTPUT
UPDATE
Counter Interrupt
DACWRT
Note
You should configure both DACs in either immediate update mode or in later update
mode, but not in a combination of the two modes. Although you can configure the DACs
in a combination of modes, doing so can result in glitches on the immediate update DAC
if the update rate on the waveform DAC is high. Refer to the
Chapter 4,
© National Instruments Corporation
Figure 3-17 illustrates a waveform generation timing sequence using the
EXTUPDATE* signal and the delayed update mode. The DACs are
updated by a high level on the DAC OUTPUT UPDATE signal, which in
this case is triggered by a low level on the EXTUPDATE* line. The
counter-interrupt signal interrupts the computer. This interrupt is generated
on the rising edge of EXTUPDATE*. The DACWRT signal writes a new
value to the DAC.
Figure 3-17. EXTUPDATE* Signal Timing for Updating DAC Output
Theory of
Operation, for details on this behavior.
The following rating applies to the EXTCONV*, EXTTRIG, OUTB1, and
EXTUPDATE* signals.
•
Absolute maximum voltage input rating
Refer to the NI-DAQ manual or to Chapter 4,
more information concerning the various modes of data acquisition and
analog output.
General-Purpose Timing Connections
General-purpose timing signals include the GATE, CLK, and OUT signals
for the three 82C53(B) counters. The 82C53 counter/timers can be used for
many general-purpose applications such as pulse and square wave
generation; event counting; and pulse-width, time-lapse, and frequency
t
50 ns min
w
3-27
Chapter 3
Connecting the Signals
Analog Output
section in
–0.5 to 5.5 V with respect
to DGND
Theory of
Operation, for
DAQCard-1200 User Manual
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