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5.6.2
Selecting the PTS Mode
The second byte of each PTSCB is always an 8-bit value called PTSCON. Bits 5–7 select the PTS
mode (Figure 5-15). The function of bits 0–4 differ for each PTS mode. Refer to the sections that
describe each mode in detail to see the function of these bits. Table 5-4 on page 5-12 lists the cycle
execution times for each PTS mode.
PTSCON
The PTS control (PTSCON) register selects the PTS mode and sets up control functions for that
mode.
7
M2
M1
Bit
Bit
Number
Mnemonic
7:5
M2:0
†
The function of this bit depends upon which mode is selected. See the PTS control block description
in each PTS mode section.
Figure 5-15. PTS Mode Selection Bits (PTSCON Bits 7:5)
5.6.3
Single Transfer Mode
In single transfer mode, an interrupt causes the PTS to transfer a single byte or word (selected by
the BW bit in PTSCON) from one memory location to another. This mode is typically used with
the EPA to move captured time values from the event-time register to internal RAM for further
processing. See AP-483, Application Examples Using the 8XC196MC/MD Microcontroller, for
application examples with code. Figure 5-16 shows the PTS control block for single transfer
mode.
†
M0
PTS Mode
These bits select the PTS mode:
M2
M1
M0
0
0
0
block transfer
0
0
1
serial receive (MC, MD only)
0
1
0
reserved
0
1
1
serial transmit (MC, MD only)
1
0
0
single transfer
1
0
1
reserved
1
1
0
A/D scan
1
1
1
reserved
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STANDARD AND PTS INTERRUPTS
Address: PTSPCB + 1
†
†
Function
0
†
†
5-27
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