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Emulation Clips
The emulation clipsin lines are sampled once every bus cycle when the address bits become
valid on the address bus. During emulation, the PICE system records the value of these lines in
the trace buffer, once every execution cycle. Because not all clips data is stored, a clips value
can cause a break, and its data will not appear in the trace buffer. Table 1-2 lists the DC
characteristics of the emulation clipsin lines.
clipsout lines
SYSBREAK
SYSTRACE
clipsin lines
The Target System User Interfaces
The three target system interfaces are the 8086/8088 probe, the 80186/80188 probe, and the
80286 probe.
Consult the PICE™ data sheet for the latest probe electrical characteristics and for the timing
differences between the probe and the corresponding chip.
PICE™ System Overview
Table 1-2 PICE™ System Emulation Clips—DC Characteristics
Input Voltage
Low
High
V,L
V
1.05
Input Current
Low
V,H
•
il
V
uA
2.5
50
Output Current
High
Low
l|H
loL
uA
mA
33 at 0.7 V
38 at 0.7 V
50
High
loH
mA
4.8 at 2.0 V
1.0 at 2.0 V
1
19
1-20
-
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