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The RESET ICE command also returns the AX, BX, CX, and DX registers, the stack and base
pointers, and the source and destination indexes to the same values that the 80286 registers
have after reset.
Resetting the 80286 Chip and the 80286 Probe
The system clock provides the fundamental timing for the 80286 system. It is divided by two
inside the 80286 microprocessor to generate the processor clock (PCLK). The 80286 probe
also generates a signal called PCLK, as may the target system. The 80286 microprocessor's
internal divide-by-two circuitry can be synchronized to an external clock generator by a low-to-
high transition on the RESET input to the 80286 microprocessor. Asynchronous PCLK phas
ing may cause bus contention between the target system and the PICE system. The following
three conditions can cause the phase of PCLK in the 80286 probe to differ from PCLK in the
target system.
•
Reset from the host (RESET ICE command, RESET UNIT command, UNITHOLD com
mand, and when an auto reset is requested).
•
User hardware reset while the probe is in interrogation mode or when the RSTEN pseudo
variable is FALSE.
•
User system power-on reset.
If PCLK synchronization is a problem, use one of the following solutions.
•
Design the PCLK generation circuit in the user system to be synchronized with status bits
rather than RESET. (The 82284 clock generator uses the status lines SO and SI to synchro
nize its PCLK output.)
•
Before starting a debug session, enter emualtion and then reset the target system to syn
chronize the PCLKs. The PCLKs will remain synchronous until a RESET UNIT com
mand, a RESET ICE command, or a target system reset with the probe in interrogation
mode. If one of these conditions occurs, enter emulation and reset the target system to
restore synchronization.
When the 80286 probe is reset, the address and data buses are in a 3-state condition for the full
duration of the reset.
Timing Differences Between the iAPX 286 and the 80286 Probe
There are timing differences between the ways that the PICE 80286 probe and the 80286 chip
handle RESET and HOLD/HLDA. See the PICE data sheet for an explanation of these
differences.
User Substrate Capacitor and + 5 Volt Source
The prototype hardware need not supply a substrate capacitor or + 5 volts to the 80286 probe.
4-24
The PICE™ System Personality Modules (Probes)
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