Icom IC-R9500 Service Manual Addendum page 247

CPLD (LOGIC/LOGIC-A UNIT; IC605)
Pin Port
number name
H8_A13− Outputs data signal to CPU2
1−27
H8_WAIT# (IC604).
DPL_BUSY Outputs data signal to dual SRAM
28−37
DPL_LB# (IC51).
Outputs data signal to CPU2
45 TDO0
(IC604).
Outputs serial data signal to CPU2
47 TMS
(IC604).
Outputs clock data signal to CPU2
48 TCK
(IC604).
49−58 IMS0−IMS7 Outputs serial data signal.
Outputs control signal to ANT unit.
63 HFANTI
Outputs control signal to ANT unit.
64 HFANTO
65 BSTB Outputs strobe signal to BPF unit.
66 RASTB Outputs strobe signal to RF-A unit.
67 RBSTB Outputs strobe signal to RF-B unit.
Outputs serial data to DSP IC
68 DSON
(MAIN UNIT; IC1005).
Outputs serial data to DSP IC
70 DSAP
(MAIN UNIT; IC1005).
Outputs strobe signal to DSP IC
71 DSTB
(MAIN UNIT; IC1005).
81 APIRQ Outputs IRQ signal to unit.
Input por t for serial data from
82 APSI
attached UT-122.
Outputs clock signal to attached
85 APCK
UT-122.
Outputs serial data to attached
86 APSO
UT-122.
Outputs strobe signal to attached
87 APSTB
UT-122.
I n p u t p o r t f o r " B U S Y " f r o m
89 APBUSY
attached UT-122.
APAFSL1− Output AF line control signal to
90−92
APAFSL3 the AF circuits.
94 DRESL Input port for reset signal.
99 PLD_RES Input port for reset signal.
Description
High : ANT 1 is selected.
Low : ANT 2 is selected.
High : V/U ANT 1 is selected.
Low : V/U ANT 2 is selected.
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