MSI 915GLM4-F User Manual page 54

PCI Latency Timer
This item controls how long each PCI device can hold the bus before another
takes over. W hen set to higher values, every PCI device can conduct transac-
tions for a longer time and thus improve the effective PCI bandwidth. For better
PCI performance, you should set the item to higher values. Setting options:
[32], [64], [96], [128], [160], [192], [224], [248].
PCI Slot1 IRQ, PCI Slot2 IRQ, PCI Slot3 IRQ
These items specify the IRQ line for each PCI slot. Setting options: [3], [4], [5],
[7], [9], [10], [11], [12], [14], [15], [Auto]. Selecting [Auto] allows BIOS to auto-
matically determine the IRQ line for each PCI slot.
IRQ Resource Setup
Press <Enter> and the following sub-menu appears.
IRQ 3/4/5/7/9/10/11/14/15
These items specify the bus where the specified IRQ line is used.
The settings determine if AMIBIOS should remove an IRQ from the pool of
available IRQs passed to devices that are configurable by the system
BIOS. The available IRQ pool is determined by reading the ESCD NVRAM. If
more IRQs must be removed from the IRQ pool, the end user can use these
settings to reserve the IRQ by assigning an [Reserved] setting to it. Onboard
I/O is configured by AMIBIOS. All IRQs used by onboard I/O are configured
as [Available]. If all IRQs are set to [Reserved], and IRQ 14/15 are allocated
to the onboard PCI IDE, IRQ 9 will still be available for PCI and PnP devices.
Available settings: [Reserved] and [Available].
DM A Resource Setup
Press <Enter> and the following sub-menu appears.
DMA Channel 0/1/3/5/6/7
These items specify the bus that the system DMA (Direct Memory Access)
channel is used. The settings determine if AMIBIOS should remove a DMA
from the available DMAs passed to devices that are configurable by the
system BIOS. The available DMA pool is determined by reading the ESCD
NVRAM. If more DMAs must be removed from the pool, the end user can
reserve the DMA by assigning [Reserved] setting to it.
BIOS Setup
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