Effects Of Clkstp, Clkxp, And Clkrp On The Clock Scheme; Register Bit Used To Enable/Disable The Receive Multichannel Selection Mode; Register Bit Used To Choose One Or Two Phases For The Receive Frame - Texas Instruments TMS320 2833 Series Reference Manual

Receiver Configuration
Table 12-23. Effects of CLKSTP, CLKXP, and CLKRP on the Clock Scheme
Bit Settings Clock Scheme
CLKSTP = 00b or 01b Clock stop mode disabled. Clock enabled for non-SPI mode.
CLKXP = 0 or 1
CLKRP = 0 or 1
CLKSTP = 10b Low inactive state without delay: The McBSP transmits data on the rising edge of CLKX and receives data on the
falling edge of MCLKR.
CLKXP = 0
CLKRP = 0
CLKSTP = 11b Low inactive state with delay: The McBSP transmits data one-half cycle ahead of the rising edge of CLKX and
receives data on the rising edge of MCLKR.
CLKXP = 0
CLKRP = 1
CLKSTP = 10b High inactive state without delay: The McBSP transmits data on the falling edge of CLKX and receives data on the
rising edge of MCLKR.
CLKXP = 1
CLKRP = 0
CLKSTP = 11b High inactive state with delay: The McBSP transmits data one-half cycle ahead of the falling edge of CLKX and
receives data on the falling edge of MCLKR.
CLKXP = 1
CLKRP = 1
12.8.6 Receive Multichannel Selection Mode
The RMCM bit determines whether the receive multichannel selection mode is on. RMCM is described in
Table 12-24. For more details, see
Table 12-24. Register Bit Used to Enable/Disable the Receive Multichannel Selection Mode
Register Bit
MCR1 0
12.8.7 Receive Frame Phases
The RPHASE bit (see
Table 12-25. Register Bit Used to Choose One or Two Phases for the Receive Frame
Register Bit Name
RCR2 15 RPHASE
702
Multichannel Buffered Serial Port (McBSP)
Section 12.6.6.
Name Function
RMCM Receive multichannel selection mode
RMCM = 0
RMCM = 1
Table 12-25) determines whether the receive data frame has one or two phases.
Function
Receive phase number
Specifies whether the receive frame has 1 or 2 phases.
RPHASE = 0
RPHASE = 1
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The mode is disabled.
All 128 channels are enabled.
The mode is enabled.
Channels can be individually enabled or disabled.
The only channels enabled are those selected in the
appropriate receive channel enable registers (RCERs).
The way channels are assigned to the RCERs
depends on the number of receive channel partitions
(2 or 8), as defined by the RMCME bit.
Single-phase frame
Dual-phase frame
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Reset
Type Value
R/W 0
Reset
Type Value
R/W 0
SPRUI07 – March 2020
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