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Texas Instruments TMS320x2833x Manuals
Manuals and User Guides for Texas Instruments TMS320x2833x. We have
1
Texas Instruments TMS320x2833x manual available for free PDF download: Reference Manual
Texas Instruments TMS320x2833x Reference Manual (115 pages)
Enhanced Pulse Width Modulator (ePWM) Module
Brand:
Texas Instruments
| Category:
Controller
| Size: 0.78 MB
Table of Contents
Table of Contents
3
Preface
8
Introduction
11
Submodule Overview
11
Multiple Epwm Modules
13
Submodules and Signal Connections for an Epwm Module
14
Register Mapping
15
Epwm Submodules and Critical Internal Signal Interconnects
15
Epwm Module Control and Status Register Set Grouped by Submodule
16
Epwm Submodules
17
Overview
17
Submodule Configuration Parameters
17
Time-Base (TB) Submodule
20
Time-Base Submodule Block Diagram
20
Time-Base Submodule Signals and Registers
21
Time-Base Submodule Registers
21
Key Time-Base Signals
22
Time-Base Frequency and Period
23
Time-Base Counter Synchronization Scheme 1
25
Time-Base Counter Synchronization Scheme 2
26
Time-Base Counter Synchronization Scheme 3
27
Time-Base Up-Count Mode Waveforms
29
Time-Base Down-Count Mode Waveforms
30
Time-Base Up-Down-Count Waveforms, TBCTL[PHSDIR = 0] Count down on Synchronization Event
30
Counter-Compare (CC) Submodule
31
Time-Base Up-Down Count Waveforms, TBCTL[PHSDIR = 1] Count up on Synchronization Event
31
Counter-Compare Submodule
31
Detailed View of the Counter-Compare Submodule
32
Counter-Compare Submodule Registers
32
Counter-Compare Submodule Key Signals
33
Counter-Compare Event Waveforms in Up-Count Mode
35
Counter-Compare Events in Down-Count Mode
36
Action-Qualifier (AQ) Submodule
37
Counter-Compare Events in Up-Down-Count Mode, TBCTL[PHSDIR = 0] Count down on Synchronization Event
37
Counter-Compare Events in Up-Down-Count Mode, TBCTL[PHSDIR = 1] Count up on Synchronization Event
37
Action-Qualifier Submodule
38
Action-Qualifier Submodule Registers
38
Action-Qualifier Submodule Inputs and Outputs
39
Action-Qualifier Submodule Possible Input Events
39
Possible Action-Qualifier Actions for Epwmxa and Epwmxb Outputs
40
Action-Qualifier Event Priority for Up-Down-Count Mode
41
Action-Qualifier Event Priority for Up-Count Mode
41
Action-Qualifier Event Priority for Down-Count Mode
41
Behavior if CMPA/CMPB Is Greater than the Period
41
Up-Down-Count Mode Symmetrical Waveform
43
Up, Single Edge Asymmetric Waveform, with Independent Modulation on Epwmxa and Epwmxb-Active High
44
Up, Single Edge Asymmetric Waveform with Independent Modulation on Epwmxa and Epwmxb-Active Low
45
Up-Count, Pulse Placement Asymmetric Waveform with Independent Modulation on Epwmxa
46
Up-Down-Count, Dual Edge Symmetric Waveform, with Independent Modulation on Epwmxa and Epwmxb - Active Low
48
Up-Down-Count, Dual Edge Symmetric Waveform, with Independent Modulation on Epwmxa and Epwmxb - Complementary
49
Up-Down-Count, Dual Edge Asymmetric Waveform, with Independent Modulation on Epwmxa-Active Low
50
Dead-Band Generator (DB) Submodule
51
Dead_Band Submodule
51
Dead-Band Generator Submodule Registers
51
Configuration Options for the Dead-Band Submodule
52
Dead-Band Waveforms for Typical Cases (0% < Duty < 100%)
53
Classical Dead-Band Operating Modes
53
Dead-Band Delay Values in Μs as a Function of DBFED and DBRED
54
PWM-Chopper (PC) Submodule
55
PWM-Chopper Submodule
55
PWM-Chopper Submodule Registers
55
PWM-Chopper Submodule Operational Details
56
Simple PWM-Chopper Submodule Waveforms Showing Chopping Action Only
56
PWM-Chopper Submodule Waveforms Showing the First Pulse and Subsequent Sustaining Pulses
57
Possible Pulse Width Values for SYSCLKOUT = 100 Mhz
57
PWM-Chopper Submodule Waveforms Showing the Pulse Width (Duty Cycle) Control of Sustaining Pulses
58
Trip-Zone (TZ) Submodule
59
Trip-Zone Submodule
59
Trip-Zone Submodule Registers
60
Possible Actions on a Trip Event
61
Trip-Zone Submodule Mode Control Logic
62
Event-Trigger (ET) Submodule
63
Trip-Zone Submodule Interrupt Logic
63
Event-Trigger Submodule
63
Event-Trigger Submodule Inter-Connectivity of ADC Start of Conversion
64
Event-Trigger Submodule Showing Event Inputs and Prescaled Outputs
65
Event-Trigger Submodule Registers
65
Event-Trigger Interrupt Generator
66
Event-Trigger SOCA Pulse Generator
67
Event-Trigger SOCB Pulse Generator
67
Applications to Power Topologies
68
Overview of Multiple Modules
68
Key Configuration Capabilities
68
Simplified Epwm Module
68
Controlling Multiple Buck Converters with Independent Frequencies
69
EPWM1 Configured as a Typical Master, EPWM2 Configured as a Slave
69
Control of Four Buck Stages. here F
70
Pwm1 Pwm2 Pwm3 Pwm4
70
Pwm1 ≠ F Pwm2 ≠ F Pwm3 ≠ F Pwm4
70
Buck Waveforms for (Note: Only Three Bucks Shown Here)
71
Controlling Multiple Buck Converters with same Frequencies
73
Control of Four Buck Stages
73
Pwm2 Pwm1
73
Pwm2 Pwm1
74
Buck Waveforms for
74
Pwm1) )
74
Controlling Multiple Half H-Bridge (HHB) Converters
76
Pwm2 Pwm1)
76
Control of Two Half-H Bridge Stages
76
Half-H Bridge Waveforms for
77
Controlling Dual 3-Phase Inverters for Motors (ACI and PMSM)
78
Control of Dual 3-Phase Inverter Stages as Is Commonly Used in Motor Control
79
56 3-Phase Inverter Waveforms for (Only One Inverter Shown)
80
Practical Applications Using Phase Control between PWM Modules
82
Configuring Two PWM Modules for Phase Control
82
Controlling a 3-Phase Interleaved DC/DC Converter
83
Timing Waveforms Associated with Phase Control between 2 Modules
83
Control of a 3-Phase Interleaved DC/DC Converter
84
60 3-Phase Interleaved DC/DC Converter Waveforms for
85
Controlling Zero Voltage Switched Full Bridge (ZVSFB) Converter
87
Pwm2 Pwm1
87
Controlling a Full-H Bridge Stage
87
ZVS Full-H Bridge Waveforms
88
Registers
90
Time-Base Submodule Registers
90
Time-Base Period Register (TBPRD)
90
Time-Base Phase Register (TBPHS)
90
Time-Base Counter Register (TBCTR)
90
Time-Base Period Register (TBPRD) Field Descriptions
90
Time-Base Phase Register (TBPHS) Field Descriptions
90
Time-Base Counter Register (TBCTR) Field Descriptions
90
Time-Base Control Register (TBCTL)
91
Time-Base Control Register (TBCTL) Field Descriptions
91
Time-Base Status Register (TBSTS)
93
Time-Base Status Register (TBSTS) Field Descriptions
93
Counter-Compare Submodule Registers
94
Counter-Compare a Register (CMPA)
94
Counter-Compare B Register (CMPB)
94
Counter-Compare a Register (CMPA) Field Descriptions
94
Counter-Compare B Register (CMPB) Field Descriptions
95
Counter-Compare Control Register (CMPCTL)
96
Counter-Compare Control Register (CMPCTL) Field Descriptions
96
Action-Qualifier Submodule Registers
97
Compare a High Resolution Register (CMPAHR)
97
Action-Qualifier Output a Control Register (AQCTLA)
97
Compare a High Resolution Register (CMPAHR) Field Descriptions
97
Action-Qualifier Output a Control Register (AQCTLA) Field Descriptions
97
Action-Qualifier Output B Control Register (AQCTLB)
98
Action-Qualifier Output B Control Register (AQCTLB) Field Descriptions
98
Action-Qualifier Software Force Register (AQSFRC)
99
Action-Qualifier Software Force Register (AQSFRC) Field Descriptions
99
Action-Qualifier Continuous Software Force Register (AQCSFRC)
100
Action-Qualifier Continuous Software Force Register (AQCSFRC) Field Descriptions
100
Dead-Band Submodule Registers
101
Dead-Band Generator Control Register (DBCTL)
101
Dead-Band Generator Control Register (DBCTL) Field Descriptions
102
PWM-Chopper Submodule Control Register
103
Dead-Band Generator Rising Edge Delay Register (DBRED)
103
Dead-Band Generator Falling Edge Delay Register (DBFED)
103
PWM-Chopper Control Register (PCCTL)
103
Dead-Band Generator Rising Edge Delay Register (DBRED) Field Descriptions
103
Dead-Band Generator Falling Edge Delay Register (DBFED) Field Descriptions
103
PWM-Chopper Control Register (PCCTL) Bit Descriptions
104
Trip-Zone Submodule Control and Status Registers
105
Trip-Zone Select Register (TZSEL)
105
Trip-Zone Submodule Select Register (TZSEL) Field Descriptions
105
Trip-Zone Control Register (TZCTL)
106
Trip-Zone Enable Interrupt Register (TZEINT)
106
Trip-Zone Control Register (TZCTL) Field Descriptions
106
Trip-Zone Enable Interrupt Register (TZEINT) Field Descriptions
106
Trip-Zone Flag Register (TZFLG)
107
Trip-Zone Clear Register (TZCLR)
107
Trip-Zone Flag Register (TZFLG) Field Descriptions
107
Event-Trigger Submodule Registers
108
Trip-Zone Force Register (TZFRC)
108
Event-Trigger Selection Register (ETSEL)
108
Trip-Zone Clear Register (TZCLR) Field Descriptions
108
Trip-Zone Force Register (TZFRC) Field Descriptions
108
Event-Trigger Prescale Register (ETPS)
109
Event-Trigger Selection Register (ETSEL) Field Descriptions
109
Event-Trigger Prescale Register (ETPS) Field Descriptions
110
Event-Trigger Flag Register (ETFLG)
111
Event-Trigger Flag Register (ETFLG) Field Descriptions
111
Event-Trigger Clear Register (ETCLR)
112
Event-Trigger Force Register (ETFRC)
112
Event-Trigger Clear Register (ETCLR) Field Descriptions
112
Proper Interrupt Initialization Procedure
113
Appendix A Revision History
114
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