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6.6 Control Registers
This section describes the same control registers of all port groups as a single register. For the register and bit con-
figurations in each port group and their initial values, refer to "Control Register and Port Function Configuration of
this IC."
Px Port Data Register
Register name
Bit
PxDAT
15–8 PxOUT[7:0]
7–0 PxIN[7:0]
*1: This register is effective when the GPIO function is selected.
*2: The bit configuration differs depending on the port group.
*3: The initial value may be changed by the port.
Bits 15–8 PxOUT[7:0]
These bits are used to set data to be output from the GPIO port pins.
1 (R/W): Output high level from the port pin
0 (R/W): Output low level from the port pin
When output is enabled (PxIOEN.PxOENy bit = 1), the port pin outputs the data set here. Although
data can be written when output is disabled (PxIOEN.PxOENy bit = 0), it does not affect the pin status.
These bits do not affect the outputs when the port is used as a peripheral I/O function.
Bits 7–0
PxIN[7:0]
The GPIO port pin status can be read out from these bits.
1 (R):
Port pin = High level
0 (R):
Port pin = Low level
The port pin status can be read out when input is enabled (PxIOEN.PxIENy bit = 1). When input is
disabled (PxIOEN.PxIENy bit = 0), these bits are always read as 0.
When the port is used for a peripheral I/O function, the input value cannot be read out from these bits.
Px Port Enable Register
Register name
Bit
PxIOEN
15–8 PxIEN[7:0]
7–0 PxOEN[7:0]
*1: This register is effective when the GPIO function is selected.
*2: The bit configuration differs depending on the port group.
Bits 15–8 PxIEN[7:0]
These bits enable/disable the GPIO port input.
1 (R/W): Enable (The port pin status is input.)
0 (R/W): Disable (Input data is fixed at 0.)
When both data output and data input are enabled, the pin output status controlled by this IC can be read.
These bits do not affect the input control when the port is used as a peripheral I/O function.
Bits 7–0
PxOEN[7:0]
These bits enable/disable the GPIO port output.
1 (R/W): Enable (Data is output from the port pin.)
0 (R/W): Disable (The port is placed into Hi-Z.)
These bits do not affect the output control when the port is used as a peripheral I/O function.
Px Port Pull-up/down Control Register
Register name
Bit
PxRCTL
15–8 PxPDPU[7:0]
7–0 PxREN[7:0]
*1: This register is effective when the GPIO function is selected.
*2: The bit configuration differs depending on the port group.
S1C17M12/M13 TECHNICAL MANUAL
(Rev. 1.2)
Bit name
Initial
0x00
0x00
Bit name
Initial
0x00
0x00
Bit name
Initial
0x00
0x00
Seiko Epson Corporation
Reset
R/W
H0
R/W
–
H0
R
Reset
R/W
H0
R/W
–
H0
R/W
Reset
R/W
H0
R/W
–
H0
R/W
6 I/O PORTS (PPORT)
Remarks
Remarks
Remarks
6-7
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