Marantz SR5006 Service Manual page 144

Pin No. Mnemonic Type
13 RXC_2− HDMI input
14 RXC_2+ HDMI input
15 HP_CTRLD Digital output
16 5V_DETD Digital input
17 DGND Ground
18 DVDD Power
19 DDCD_SDA Digital I/O
20 DDCD_SCL Digital input
21 CVDD Power
22 CGND Ground
23 RXD_C− HDMI input
24 RXD_C+ HDMI input
25 TVDD Power
26 RXD_0− HDMI input
27 RXD_0+ HDMI input
28 CGND Ground
29 RXD_1− HDMI input
30 RXD_1+ HDMI input
31 TVDD Power
32 RXD_2− HDMI input
33 RXD_2+ HDMI input
34 CVDD Power
35 CGND Ground
36 TXPVDD Power
37 TXPLVDD Power
38 TXGND Ground
39 TXPGND Ground
40 EXT_SWING Analog input
41 HPD_ARC− Analog input
42 ARC+ Analog input
43 TXDDC_SDA Digital I/O
44 TXDDC_SCL Digital output
45 TXAVDD Power
46 TXGND Ground
47 TXC− HDMI output
48 TXC+ HDMI output
49 TXGND Ground
50 TX0− HDMI output
51 TX0+ HDMI output
52 TXGND Ground
53 TX1− HDMI output
54 TX1+ HDMI output
55 TXAVDD Power
Description
Digital Input Channel 2 Complement of Port C in the HDMI Interface.
Digital Input Channel 2 True of Port C in the HDMI Interface.
Hot Plug Detect for Port D.
5 V Detect Pin for Port D in the HDMI Interface.
DVDD Ground.
Digital Supply Voltage (1.8 V).
HDCP Slave Serial Data Port D. DDCD_SDA is a 3.3 V input/output that is 5 V tolerant.
HDCP Slave Serial Clock Port D. DDCD_SCL is a 3.3 V input that is 5 V tolerant.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
Digital Input Clock Complement of Port D in the HDMI Interface.
Digital Input Clock True of Port D in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 0 Complement of Port D in the HDMI Interface.
Digital Input Channel 0 True of Port D in the HDMI Interface.
TVDD and CVDD Ground.
Digital Input Channel 1 Complement of Port D in the HDMI Interface.
Digital Input Channel 1 True of Port D in the HDMI Interface.
Receiver Terminator Supply Voltage (3.3 V).
Digital Input Channel 2 Complement of Port D in the HDMI Interface.
Digital Input Channel 2 True of Port D in the HDMI Interface.
Receiver Comparator Supply Voltage (1.8 V).
TVDD and CVDD Ground.
1.8 V Power Supply for Digital and I/O Power Supply. This pin supplies power to the
digital logic and I/Os. It should be ltered and as quiet as possible.
1.8 V Power Supply.
TXPVDD Ground.
TXPLVDD Ground.
This pin sets the internal reference currents. Place an 887 Ω resistor (1% tolerance) between
this pin and ground.
Hot Plug Detect Signal. This pin indicates to the interface whether the receiver is connected.
It supports 1.8 V to 5 V CMOS logic levels.
Audio Return Channel Input (5 V Tolerant).
Serial Port Data I/O to Receiver. This pin serves as the master to the DDC bus. It supports a
5 V CMOS logic level.
Serial Port Data Clock to Receiver. This pin serves as the master clock for the DDC bus.
It supports a 5 V CMOS logic level.
1.8 V Power Supply for TMDS Outputs.
TXAVDD Ground.
Di erential Clock Output. Di erential clock output at the TMDS clock rate; supports
TMDS logic level.
Di erential Clock Output. Di erential clock output at the TMDS clock rate; supports
TMDS logic level.
TXAVDD Ground.
Di erential Output Channel 0 Complement. Di erential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
Di erential Output Channel 0 True. Di erential output of the red data at 10× the pixel clock
rate; supports TMDS logic level.
TXAVDD Ground.
Di erential Output Channel 1 Complement. Di erential output of the red data at 10×
the pixel clock rate; supports TMDS logic level.
Di erential Output Channel 1 True. Di erential output of the red data at 10× the pixel
clock rate; supports TMDS logic level.
1.8 V Power Supply for TMDS Outputs.
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