Intel CHIPS DKHiQV-AGP User Manual page 22

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17
W26
1-2
2-3
W27
1-2
2-3
W28
1-2
2-3
W29
1-2
2-3
W30
1-2
2-3
W31
1-2
2-3
W32
1-2
2-3
W33
1-2
2-3
W34
1-2
2-3
W35
1-2
2-3
W36
1-2
2-3
W37
1-2
2-3
W38
1-2
2-3
W39
1-2
2-3
W40
OPEN
CLOSED
JP1
1-2
OPEN
JP2
1-2
OPEN
JP3
1-2
OPEN
JP4
1-2
2-3
OPEN
JP5
1-2
2-3
3-4
1-4
JP6
1-2
2-3
3-4
1-4
JP7
1-2
2-3
3-4
1-4
JP8
1-2
2-3
3-4
1-4
&+,36
®
DKHiQV-AGP (Fab. Rev. A) Subject to Change Without Notice
DKHiQV-AGP (Fab. Rev. A) User's Guide
OSCVCC is 5V
OSCVCC is W35 voltage
AVCC55Xis 5VNC
AVCC55X is W35 voltage
IVCC55X is W29 voltage
IVCC55X is output of U13
W29 voltage is 5VNC
W29 voltage is W35 voltage
DVCC55X is 5VNC
DVCC55X is W35 voltage
MVCC55X from 5VNC
MVCC55X from 3VMAIN
RAMVCC from GVCC for 5V DRAM
RAMVCC from 3VMAIN for 3V DRAM
BVCC55X is +5VNC
BVCC55X is W35 voltage
XVCC55X is +5VNC
XVCC55X is W35 voltage
W35 voltage is U15 output adjustable by pot R76 (approx. 2.0 - 5.5V @ 3A)
W35 voltage is 3.3V from the PCI connector
CVCC from 3VMAIN
CVCC from 5VNC
PCLK goes to panel connector J5 instead of "M" for PanelLink STN-DD
"M" goes to panel connector J5
VDDSAFE uses GVCC (+5V)
VDDSAFE uses 3VMAIN (W35)
VEESAFE is controlled by R82 (potrentiometer)
VEESAFE is controlled by W21
INT# disconnected from INTA on PCI bus
INT# connected to INTA on PCI bus
RED output has 37.5-ohm termination on-board (for TV out).
RED output has 75-ohm termination on-board (for CRT drive).
GREEN output has 37.5-ohm termination on-board (for TV out).
GREEN output has 75-ohm termination on-board (for CRT drive).
BLUE output has 37.5-ohm termination on-board (for TV out).
BLUE output has 75-ohm termination on-board (for CRT drive).
Panel connector J5 has DVCC55X (for LVDS Interface)
Panel connector J5 has 3VREG2 (U13 for PanelLink Interface.
Panel connector J5 has no additional VCC
SCL for multimedia daughtercard is driven by JP9 pin 3.
SDA for multimedia daughtercard is driven by JP9 pin 3.
SDA for multimedia daughtercard is driven by ACTI/GPIO0/CSYNC.
SCL for multimedia daughtercard is driven by ACTI/GPIO0/CSYNC.
SCL for multimedia daughtercard is driven by 54GPIO3.
SDA for multimedia daughtercard is driven by 54GPIO3
SDA for multimedia daughtercard is driven by JP9/JP10 pin 1.
SCL for multimedia daughtercard is driven by JP9/JP10 pin 1.
DDCCLK for CRT is driven by 54GPIO3.
DDCDAT for CRT is driven by 54GPIO3.
DDCDAT for CRT is driven by JP9/JP10 pin 1.
DDCCLK for CRT is driven by JP9/JP10 pin 1.
DDCCLK for CRT is driven by JP9 pin 3.
DDCDAT for CRT is driven by JP9 pin 3.
DDCDAT for CRT is driven by ACTI/GPIO0/CSYNC.
DDCCLK for CRT is driven by ACTI/GPIO0/CSYNC.
Revision 1.0 7/13/98

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