The following figure shows the layout of the CPUs and DIMMs inside the chassis. The front of the system is at the top of the
figure.
Figure 5. CPU and memory locations
To ensure maximum memory performance, there are memory DIMM population rules so that the memory loading and interleaving
is optimal. The sections below specifiy the DIMM location rules for each memory configurations:
DD6300 AIO Base (48 GB)
Table 5. Memory locations - CPU 0
Slot
DD6300 AIO Base
Table 6. Memory locations - CPU 1
Slot
DD6300 AIO Base
DD6300 AIO Expanded (96 GB)
Table 7. Memory locations - CPU 0
Slot
DD6300 AIO Expanded
Table 8. Memory locations - CPU 1
Slot
DD6300 AIO Expanded
DD6800 DLH (192 GB)
Table 9. Memory locations - CPU 0
Slot
28
Field Replaceable Units
Channel A
0
1
Channel A
8
9
8GB
Channel A
0
1
8GB
Channel A
8
9
8GB
8GB
Channel A
0
1
Channel B
2
3
4
8GB
Channel B
10
11
12
8GB
Channel B
2
3
4
8GB
8GB
Channel B
10
11
12
8GB
8GB
Channel B
2
3
4
Channel D
Channel C
5
6
8GB
Channel D
Channel C
13
14
8GB
Channel D
Channel C
5
6
8GB
8GB
Channel D
Channel C
13
14
8GB
Channel D
Channel C
5
6
7
8GB
15
7
8GB
15
8GB
7