Preface: About This Guide; Guide Contents; Conventions; Typographical - Xilinx ML623 User Manual

Virtex-6 fpga gtx transceiver characterization board
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About This Guide
This document describes the basic setup, features, and operation of the ML623
Virtex-6 FPGA GTX transceiver characterization board. The ML623 board provides the
hardware environment for characterizing and evaluating the GTX transceivers available
on the Virtex®-6 XC6VLX240T-2FFG1156C FPGA.

Guide Contents

This user guide contains the following chapters and appendices:
To find additional documentation, see the Xilinx website at:
To search the Answer Database of silicon, software, and IP questions and answers, or to
create a technical support WebCase, see the Xilinx website at:

Conventions

This document uses the following conventions. An example illustrates each convention.

Typographical

The following typographical conventions are used in this document:
ML623 Board User Guide
UG724 (v1.1) September 15, 2010
Chapter 1, ML623 Board Features and
and operation of the ML623 Virtex-6 FPGA GTX transceiver characterization board.
Appendix A, Default Jumper
board for proper operation.
Appendix B, VITA 57.1 FMC HPC Connector
the FPGA mezzanine card (FMC) connector.
Appendix C, ML623 Master UCF
constraints file (UCF).
Appendix D,
References, provides a list of references and links to related
documentation.
http://www.xilinx.com/support/documentation/index.htm.
http://www.xilinx.com/support.
www.xilinx.com
Operation, describes the components, features,
Positions, lists the jumpers that must be installed on the
Pinout, provides a pinout reference for
Listing, provides a listing of the ML623 master user
Preface
5

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