Chapter 3
Hardware Overview
RTSI Triggers
Digital I/O (PCI-4451/4452 Only)
Note
At system power-on and reset, the hardware sets both the PFI and DIO lines to high
impedance. This means that the device circuitry is not actively driving the output either
high or low. For example, DIO0 will be in the high impedance state after power on, and
PCI-4451/4452/4453/4454 User Manual
The seven RTSI trigger lines on the RTSI bus provide a very flexible
interconnection scheme for any PCI-445X device sharing the RTSI bus.
These bidirectional lines can drive any of eight timing signals onto the
RTSI bus and can receive any of these timing signals. This signal
connection scheme is shown in Figure 3-9.
Trigger
7
Clock
Figure 3-9. RTSI Bus Signal Connection
Refer to the Chapter 4,
shown in Figure 3-9.
The PCI-4451/4452 has eight lines of digital I/O for general-purpose use
through the 50-pin connector. You can individually configure each line for
either input or output.
The hardware up/down control for general-purpose counters 0 and 1
connect onboard to DIO6 and DIO7, respectively. Thus, you can use DIO6
and DIO7 to control the general-purpose counters. The up/down control
signals are input only and do not affect the operation of the DIO lines.
switch
Signal
Connections, for a description of the signals
3-12
DAQ-STC
TRIG1
TRIG2
CONVERT*
UPDATE*
WFTRIG
GPCTR0_SOURCE
GPCTR0_GATE
GPCTR0_OUT
RTSI_OSC (20 MHz)
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