Getting Started; Opening An Example - Xilinx Spartan-6 User Manual

Fpga gtp transceiver signal integrity simulation kit
Hide thumbs Also See for Spartan-6:
Table of Contents

Advertisement

Getting Started

The steps in this section must be observed to run simulations:

Opening an Example

The user can double-click on any FFS file in Windows Explorer to start a project in
HyperLynx. This user guide uses GTP_Tx_channel_GTP_Rx as an example, but this
discussion applies to the other testbenches as well. The user can double-click on the
GTP_RefClk.ffs or the GTP_Tx_channel_GTP_Rx.ffs file in the hl_projects
directory in Windows Explorer to start HyperLynx. Because the latter file is the more
complicated testbench, the remaining part of this document discusses that testbench only.
HyperLynx should start without any error or warning messages and look as shown in
Figure
X-Ref Target - Figure 1-1
Note:
be removed from the schematics because it is used to insert global simulation parameters, such as
.TEMP and .option compat (the HSPICE compatibility switch for Eldo), into the project. These
parameters are managed automatically by the configurator programs. Removing J0 results in
incorrect simulations.
Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)
UG396 (v1.0) June 10, 2010
1-1.
Figure 1-1: HyperLynx
The J0 symbol must appear unconnected on the schematics screen. This symbol should not
www.xilinx.com
Getting Started
UG396_c1_01_042010
9

Advertisement

Table of Contents
loading

Table of Contents