Pcie Slot Breakdown; M.2 Slot Breakdown - EVGA Z390 FTW User Manual

EVGA Z390 FTW (123-CS-E397)

PCIe Slot Breakdown

PCIe Lane Distribution (All Socket 1151
processors are 16 lanes.)
PE1 – x1 (Gen2, x1 lanes from PCH)

PE2 – x16 (Gen3, x16 lanes from CPU, x8 shared with PE4)

PE3 – x1 (Gen2, x1 lanes from PCH)

PE4 – x16 (Gen3, x8 lanes from CPU, shares 8 of PE2's 16 lanes)

PE5 – x4 (Gen3, x4 lanes PCH)


M.2 Slot Breakdown

M.2 Lane Distribution
M.2 Key-M (80mm, Top) – x4

o M.2 Enable/Disable is set within the BIOS
o This M.2 Key-M slot shares lanes with SATA ports 4/5. Installing an
M.2 device will disable SATA ports 4/5.
M.2 Key-M (110mm, Bottom) – x4

o M.2 Enable/Disable is set within the BIOS
M.2 Key-E (32mm) – x1

o M.2 Enable/Disable is set within the BIOS

This motherboard does NOT have any lane replication via PLX; all lanes are
native and derived from CPU or PCH. This also allows for improved backwards
compatibility for Gen 2 devices.
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