Circuit Description - Yaesu FT-26 Technical Supplement

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The FT-26 electronics consists of two major
boards: the Motherboard (or Mother Unit) and the
Control Unit, and several minor boards: the IF
Unit, Pager Unit (DTMF decoder), Clock Unit (PLL
reference), VR Unit (top panel controls) and op­
tional FTS-17 A Tone Squelch Unit. Also, two
daughter cards are mounted on the Motherboard:
the PLL Unit and the APC Unit. The Motherboard
includes the receiver front end, the later transmit­
ter stages, battery charger, supply regulation and
switching circuits. The Control Unit includes the
microprocessor, display, keypad, transmitter audio
and VOX circuits. While reading this description,
you can refer to the block diagram for an overview
of the major circuit blocks, and to the schematic
diagrams for component details.
Receive Signal Path
Incoming RF from the antenna jack on the
Motherboard passes through a lowpass filter and
a 1/4-wave antenna switching network consisting
of coil L1005, capacitors C1035
&
odes D1011
D1014. Signals within the frequency
range of the transceiver are then passed by a var­
actor-tuned bandpass filter consisting of T1004
and D1019/D1020 before RF amplification by
Q1016
The amplified RF is then band­
(2SC4537).
pass filtered again by varactor-tuned resonators
T1003/D1015/D1016, T1002/D1012/D1013 and
T1001/D1009 /D1010 to ensure pure in-band input
to 1st mixer Q1008
(2SK882Y).
Buffered 122.3 - 132.3-MHz output from the
PLL Unit is amplified by Q1002
applied to the 1st mixer. The resulting 17.7-MHz
1st mixer product is passed through dual mono­
lithic crystal filters XF1001/XF1002 (± 7 .5 kHz BW)
to strip away all but the desired signal, which is
then delivered to the IF Unit.
The 1st IF signal from the Motherboard is am­
plified by Q3002
(2SC4215Y)
subsystem IC Q3004
(MC3372M),
the 2nd mixer, 2nd local oscillator, limiter ampli­
fier, noise amplifier, S-meter amplifier and squelch
gates. A 2nd local signal is generated from 17.245
MHz crystal X3001, which produces the 455 kHz
2nd IF when mixed with the 1st IF signal within
Q3004. The 2nd IF.is passed through ceramic filter
CF3001 to strip away unwanted mixer products,
and then applied to the limiter amp in Q3004,
which removes amplitude variations in the 455
kHz IF before detection of the speech by ceramic
discriminator CD3001.
Detected audio is de-emphasized and filtered
by Q3007 and Q3011
(2SC4116GR
FT-26 Technical Supplement
Circuit D escription
&
C1050, and di­
and
(2SC3120)
FM
and applied to
IF
which contains
2), and then
x
passed through audio muting gate Q3016
This filtered receiver audio is then mixed
125D).
with the beep or DTMF tone from the Control Unit,
passed through the VOL
returned for final amplification by Q3014 (NJM386BD)
on the IF Unit before delivery via the Motherboard t o
j
the
ack and loudspeaker.
EAR
Squelch Control
The squelch circuit consists of noise detector
D3003, a highpass filter and squelch trigger within
Q3004 on the IF Unit, and control circuitry within
microprocessor Q2007
Control Unit.
When no carrier is received, noise at the output
of the detector stage in Q3004 is amplified and
highpass filtered by the noise amp section of
Q3004, and then rectified by D3003 to provide a
DC
control voltage for the squelch switching sec­
tion within Q3004. With no carrier, pin 14 of Q3004
is high. This signal is delivered to pin 1 of main
microprocessor Q2007 on the Control Unit as the
Scan Stop signal, which turns off the green (busy)
half of BUSY fTX LED via shift/ store register Q2012
Another output of Q2012 also
(µPD74HC4094G).
raises the AF MUTE line, cutting receiver audio at
Q3016 on the IF Unit. Meanwhile, AFCNT pin 80
of the microprocessor turns off the DC supply to
audio amplifier Q3014 via Q3005
Q3006
Q3009
(2SB799ML),
on the IF Unit, thus silencing the
(DTC144EU)
receiver while no signal is being received, and
during transmission.
When a carrier appears at the discriminator,
noise is removed from the output, causing pin 14
of Q3004 to go low. This signals the microprocessor
to activate the green half of the BUSY/TX LED
through Q2012. The microprocessor then checks
for CTCSS tone detection from the FTS-17A Tone
Squelch Unit (if installed), and for Digital Code
Squelch information. If not transmitting and tone
squelch is not activated, or if the received tone
matches that programmed, the microprocessor
signals Q2012 to switch Q3016 to allow audio to
pass to the amplifier and loudspeaker.
Transmit Signal Path
Speech input from the microphone is delivered
to the Control Unit for amplification and pre-em­
phasis by Q2009
(NJM2902-%).
deviation, the aud io is proce ssed by IDC
(instantaneous deviation control) stage Q2009-%,
and then lowpass filtered by Q2009-% before de­
(2SJ-
control on the VR Unit, and
on the
(HD404608-B01 H)
(2SC4116GR),
and Q3010
(IMD2)
To prevent over­

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