Uart Interfaces - Quectel LTE-A Series Hardware Design

NOTE
"*" means under development.

3.11. UART Interfaces

The module provides two UART interfaces: the main UART interface and the debug UART interface.
Their features are shown below:
⚫
The main UART interface supports 4800 bps, 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200
bps, 230400 bps, 460800 bps and 921600 bps baud rates, and the default baud rate is 115200 bps.
This interface is used for data transmission and AT command communication.
⚫
The debug UART interface supports 115200 bps baud rate. It is used for Linux console and log
output.
The following tables show the pin definition.
Table 11: Pin Definition of the Main UART Interface
Pin Name Pin No.
MAIN_RI 61
MAIN_DCD 59
MAIN_CTS 56
MAIN_RTS 57
MAIN_DTR 62
MAIN_TXD 60
MAIN_RXD 58
Table 12: Pin Definition of the Debug UART Interface
Pin Name Pin No.
DBG_TXD 137
EG060V-EA_Hardware_Design
I/O Description
DO Main UART ring indication
DO Main UART data carrier detect
DO Main UART clear to send
DI Main UART request to send
DI Main UART data terminal ready
DO Main UART transmit
DI Main UART receive
I/O Description
DO Debug UART transmit
LTE-A Module Series
EG060V-EA Hardware Design
Comment
1.8 V power domain
1.8 V power domain
1.8 V power domain
1.8 V power domain
1.8 V power domain
1.8 V power domain
1.8 V power domain
Comment
1.8 V power domain
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