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EG060V-EA
Hardware Design
LTE-A Module Series
Version: 1.0
Date: 2020-09-15
Status: Released
www.quectel.com

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Summary of Contents for Quectel LTE-A Series

  • Page 1 EG060V-EA Hardware Design LTE-A Module Series Version: 1.0 Date: 2020-09-15 Status: Released www.quectel.com...
  • Page 2: About The Document

    To the maximum extent permitted by law, Quectel excludes all liability for any loss or damage suffered in connection with the use of the functions and features under development, regardless of whether such loss or damage may have been foreseeable.
  • Page 3 EG060V-EA Hardware Design Copyright The information contained here is proprietary technical information of Quectel Wireless Solutions Co., Ltd. Transmitting, reproducing, disseminating and editing this document as well as using the content without permission are forbidden. Offenders will be held liable for payment of damages. All rights are reserved in the event of a patent grant or registration of a utility model or design.
  • Page 4 LTE-A Module Series EG060V-EA Hardware Design About the Document Revision History Version Date Author Description King MA/ 2020-09-15 Initial Benjamin CHAI EG060V-EA_Hardware_Design 3 / 82...
  • Page 5: Table Of Contents

    LTE-A Module Series EG060V-EA Hardware Design Contents About the Document ........................... 1 Contents ............................... 4 Table Index ..............................6 Figure Index ..............................7 Introduction ............................9 1.1. Safety Information........................10 Product Concept ..........................11 2.1. General Description ......................... 11 2.2. Key Features ...........................
  • Page 6 LTE-A Module Series EG060V-EA Hardware Design 3.15. Module Status Indication Interface ..................48 3.16. RI Behaviors ..........................49 3.17. PCIe Interface* ........................50 3.18. WLAN Control Interface* ......................51 3.19. SD Card Interface*........................52 3.20. SPI Interface ..........................54 3.21. USB_BOOT Interface ......................
  • Page 7 LTE-A Module Series EG060V-EA Hardware Design Table Index Table 1: Frequency Bands of EG060V-EA Module ................... 11 Table 2: Key Features of EG060V-EA Module ..................12 Table 3: I/O Parameters Definition ......................18 Table 4: Pin Description ..........................18 Table 5: Overview of Operating Modes ..................... 26 Table 6: VBAT and GND Pins ........................
  • Page 8 LTE-A Module Series EG060V-EA Hardware Design Figure Index Figure 1: Functional Diagram ........................14 Figure 2: Pin Assignment (Top View) ......................17 Figure 3: DRX Run Time and Current Consumption in Sleep Mode ............27 Figure 4: Set Sleep Mode via UART ......................28 Figure 5: Sleep Mode with Remote Wakeup .....................
  • Page 9 LTE-A Module Series EG060V-EA Hardware Design Figure 42: Bottom Dimensions (Bottom View) of the Module ..............73 Figure 43: Recommended Footprint (Top View) ..................74 Figure 44: Top View of the Module ......................75 Figure 45: Bottom View of the Module ....................... 75 Figure 46: Recommended Reflow Soldering Thermal Profile ..............
  • Page 10: Introduction

    LTE-A Module Series EG060V-EA Hardware Design Introduction This document defines the EG060V-EA module and describes its air and hardware interfaces which connect to your applications. It familiarizes you with the module’s interface specifications, electrical and mechanical details, as well as other related information.
  • Page 11: Safety Information

    EG060V-EA module. Manufacturers of the cellular terminal should notify users and operating personnel of the following safety information by incorporating these guidelines into all manuals of the product. Otherwise, Quectel assumes no liability for customers’ failure to comply with these precautions.
  • Page 12: Product Concept

    LTE-A Module Series EG060V-EA Hardware Design Product Concept 2.1. General Description EG060V-EA, a type of LTE-FDD/LTE-TDD/WCDMA wireless communication module with receive diversity, provides data connectivity on LTE-FDD, LTE-TDD, HSPA+, HSDPA, HSUPA, and WCDMA networks. Table 1: Frequency Bands of EG060V-EA Module Mode EG060V-EA LTE-FDD (with Rx-diversity)
  • Page 13: Key Features

    LTE-A Module Series EG060V-EA Hardware Design 2.2. Key Features The following table describes the detailed features of the module. Table 2: Key Features of EG060V-EA Module Feature Details Supply voltage: 3.3–4.3 V Power Supply Typical supply voltage: 3.8 V Class 3 (24 dBm +1/-3 dB) for WCDMA bands Transmitting Power Class 3 (23 dBm ±...
  • Page 14 Comply with PCI Express Specification Revision 1.0 PCIe Interface* Used for Ethernet or WLAN communication Rx-diversity Support LTE Rx-diversity Compliant with 3GPP TS 27.007, 3GPP TS 27.005 and Quectel enhanced AT Commands AT commands Two pins including NET_MODE and NET_STATUS to indicate network Network Indication...
  • Page 15: Functional Diagram

    LTE-A Module Series EG060V-EA Hardware Design conducted at all temperature levels with heat sinks and rubber pads applied. 6. “*” means under development. 2.3. Functional Diagram Below is the functional diagram of EG060V-EA with its major functional parts illustrated. ⚫ Power management ⚫...
  • Page 16: Evaluation Board

    LTE-A Module Series EG060V-EA Hardware Design 2.4. Evaluation Board To help you develop applications handily with EG060V-EA, Quectel supplies an evaluation board (EVB), USB to RS-232 converter cable, earphone, antenna and other peripherals to control or test the module. EG060V-EA_Hardware_Design...
  • Page 17: Application Interfaces

    LTE-A Module Series EG060V-EA Hardware Design Application Interfaces 3.1. General Description EG060V-EA is equipped with 299 LGA pins that can be connected to a cellular application platform. The following chapters describe the interfaces listed below. ⚫ Power supply ⚫ (U)SIM interface ⚫...
  • Page 18: Pin Assignment

    LTE-A Module Series EG060V-EA Hardware Design 3.2. Pin Assignment The following figure shows the pin assignment of the module. VBAT_RF VBAT_RF VBAT_RF VBAT_RF RESERVED RESERVED DBG_RXD DBG_TXD GPIO1 RESERVED GPIO2 RESERVED USB_BOOT RESERVED RESERVED OTG_PWR_ SLEEP_IND RESERVED COEX_TXD RESERVED COEX_RXD RESERVED NET_MODE RESERVED...
  • Page 19: Pin Description

    LTE-A Module Series EG060V-EA Hardware Design 3.3. Pin Description The following tables define and describe the pins of the module. Table 3: I/O Parameters Definition Type Description Analog Input Analog Output Digital Input Digital Output Bidirectional Open Drain Power Input Power Output Table 4: Pin Description Power Supply...
  • Page 20 LTE-A Module Series EG060V-EA Hardware Design Turn on/off Pin Name Pin No. Description DC Characteristics Comment There is a pull-up max = 4.1 V power supply inside, Turn on/off the PWRKEY min = 2.4 V no need to add any module max = 1.2 V pull-up power supply...
  • Page 21 LTE-A Module Series EG060V-EA Hardware Design max = 2.0 V OTG_PWR_ max = 0.45 V OTG power control min = 1.35 V (U)SIM Interface Pin Name Pin No. Description DC Characteristics Comment Dedicated ground USIM_GND for (U)SIM card For 1.8 V (U)SIM: Vmax = 1.9 V Vmin = 1.7 V Either 1.8 V or 3.0 V is...
  • Page 22 LTE-A Module Series EG060V-EA Hardware Design hot-plug detect max = 0.6 V If unused, keep it min = 1.2 V open. max = 2.0 V Main UART Interface Pin Name Pin No. Description DC Characteristics Comment 1.8 V power domain. Main UART ring max = 0.45 V MAIN_RI...
  • Page 23 LTE-A Module Series EG060V-EA Hardware Design open. ADC Interfaces Pin Name Pin No. Description DC Characteristics Comment General-purpose Voltage range: If unused, keep it ADC0 ADC interface 0 to 1.4 V open. General-purpose Voltage range: If unused, keep it ADC1 ADC interface 0 to 1.4 V open.
  • Page 24 LTE-A Module Series EG060V-EA Hardware Design SPI Interface Pin Name Pin No. Description DC Characteristics Comment max = 0.45 V 1.8 V power domain. SPI_CS SPI chip select min = 1.35 V If unused, keep it open. max = 0.45 V 1.8 V power domain.
  • Page 25 LTE-A Module Series EG060V-EA Hardware Design min = -0.3 V In slave mode, it is an max = 0.6 V output signal. min = 1.2 V If unused, keep it max = 2.0 V open. WLAN Control Interface* Pin Name Pin No.
  • Page 26 LTE-A Module Series EG060V-EA Hardware Design max = 0.58 V If unused, keep it SDIO_DATA2 SDIO data bit 2 min = 1.3 V open. max = 2.0 V If unused, keep it SDIO_DATA3 SDIO data bit 3 open. For 3.0 V SD: If unused, keep it SDIO_CMD SD card command...
  • Page 27: Operating Modes

    LTE-A Module Series EG060V-EA Hardware Design 1.8 V power domain. Pulled up by default. min = -0.3 V Bringing it LOW sets Airplane mode max = 0.6 V W_DISABLE# the module into control min = 1.2 V airplane mode. max = 2.0 V If unused, keep it open.
  • Page 28: Power Saving

    LTE-A Module Series EG060V-EA Hardware Design Minimum Executing AT+CFUN=0 command can set the module into minimum functionality Functionality mode without removing the power supply. In this mode, both RF function and (U)SIM Mode card are invalid. Executing AT+CFUN=4 command or driving W_DISABLE# pin to low logic level can Airplane Mode set the module into airplane mode where the RF function is invalid.
  • Page 29: Set Sleep Mode Via Uart

    LTE-A Module Series EG060V-EA Hardware Design 3.5.1.1. Set Sleep Mode via UART If the host communicates with the module via UART interface, the following steps are required to set the module into sleep mode. ⚫ Execute AT+QSCLK=1 command to enable sleep mode. ⚫...
  • Page 30: Set Sleep Mode Via Usb With Suspend/Resume And Ri Function

    LTE-A Module Series EG060V-EA Hardware Design The following figure shows the connection between module and host in this case. Host Module USB_VBUS USB_DP USB_DP USB_DM USB_DM Figure 5: Sleep Mode with Remote Wakeup The module and the host will be waken up in the following conditions: ⚫...
  • Page 31: Set Sleep Mode Via Usb Without Usb Suspend Function

    LTE-A Module Series EG060V-EA Hardware Design The module and the host will be waken up in the following conditions: ⚫ Sending data to EG060V-EA through USB will wake up the module. ⚫ When the module has a URC to report, RI signal will wake up the host. 3.5.1.4.
  • Page 32: Power Supply

    LTE-A Module Series EG060V-EA Hardware Design This mode can be set with the following approaches. ⚫ Hardware approach: The W_DISABLE# pin is pulled up by default; driving it to low level will set the module into airplane mode. ⚫ Software approach: AT+CFUN command provides the choice of functionality level through setting the value of <fun>...
  • Page 33: Decrease Voltage Drop

    LTE-A Module Series EG060V-EA Hardware Design 10, 13, 16, 17, 24, 30,31, 35, 39,44, 45, 54, 55, 63, 64, 69, 70, 75,76, 81–84, 89, 90, 92–94, 96–100, 102–106, 108–112, 114, 116–118, 120–126, 128–133, 141, 142, 148, 153, 154, 157, 158, 167, 174, 177, 178, 181, 184, 187, 191, 196, 202–208, 214–299 3.6.2.
  • Page 34: Reference Design Of Power Supply

    LTE-A Module Series EG060V-EA Hardware Design The following figure shows the star structure of the power supply. VBAT VBAT_RF VBAT_BB 100 nF 10 pF 100 μF 33 pF 100μF 100 μF 100 nF 33 pF 10 pF WS 4.5D3HV Module Figure 9: Star Structure of Power Supply 3.6.3.
  • Page 35: Monitor Power Supply

    LTE-A Module Series EG060V-EA Hardware Design NOTES To avoid damaging the internal flash, please do not cut off power supply when the module works normally. Only after the module is shut down with PWRKEY or AT command can the power supply be cut off.
  • Page 36 LTE-A Module Series EG060V-EA Hardware Design Another way to control the PWRKEY pin is by using a button. To protect your finger from electronic strikes when you press the key, a TVS component placed near the button for ESD protection is indispensable. A reference design is given below.
  • Page 37: Turn Off The Module

    LTE-A Module Series EG060V-EA Hardware Design 3.7.2. Turn off the Module Normally, there are two approaches to turning off the module: ⚫ Turn off the module using the PWRKEY pin. ⚫ Turn off the module using AT+QPOWD command. 3.7.2.1. Turn off the Module with PWRKEY Driving the PWRKEY pin to a low level for at least 800 ms, and the module will power off after the pin is released.
  • Page 38: Reset The Module

    LTE-A Module Series EG060V-EA Hardware Design 3.8. Reset the Module The module can be reset by driving RESET_N LOW for 250–600 ms. Table 8: Pin Definition of RESET_N Pin Name Pin No. Description DC Characteristics Comment max = 2.0 V RESET_N Reset the module min = 1.3 V...
  • Page 39: U)Sim Interface

    LTE-A Module Series EG060V-EA Hardware Design The timing of reset is illustrated in the following figure. VBAT ≤ 600 ms ≥ 250 ms ≥ 1.3 V RESET_N ≤ 0.5 V Module Running Resetting Restart Status Figure 17: Timing of Resetting the Module NOTES 1.
  • Page 40 LTE-A Module Series EG060V-EA Hardware Design USIM_GND Dedicated ground for (U)SIM card The module supports (U)SIM card hot-plug via the USIM_DET pin. The function, which supports low-level and high-level detections, is disabled by default. Please refer to document [1] about AT+QSIMDET command for details.
  • Page 41: Usb Interface

    LTE-A Module Series EG060V-EA Hardware Design In order to enhance the reliability and usability of the (U)SIM card in use, please follow the criteria below in (U)SIM circuit design: ⚫ Place the (U)SIM card connector to the module as close as possible. Keep the trace length as less than 200 mm as possible.
  • Page 42 LTE-A Module Series EG060V-EA Hardware Design For more details about the specifications of USB 2.0, please visit this website down below: https://www.usb.org/document-library/usb-20-specification. It is recommended to reserve in your designs the USB interface for firmware upgrades. Below is a reference design of USB 2.0 interface. Test Points Minimize these stubs Module...
  • Page 43: Uart Interfaces

    LTE-A Module Series EG060V-EA Hardware Design NOTE “*” means under development. 3.11. UART Interfaces The module provides two UART interfaces: the main UART interface and the debug UART interface. Their features are shown below: ⚫ The main UART interface supports 4800 bps, 9600 bps, 19200 bps, 38400 bps, 57600 bps, 115200 bps, 230400 bps, 460800 bps and 921600 bps baud rates, and the default baud rate is 115200 bps.
  • Page 44 LTE-A Module Series EG060V-EA Hardware Design DBG_RXD Debug UART receive 1.8 V power domain The logic levels are described in the following table. Table 13: Logic Level Parameters of Digital I/O Item Min. Max. Unit -0.3 0.45 1.35 The module provides 1.8 V UART interfaces. A level translator should be used if the application is equipped with a 3.3 V UART interface.
  • Page 45: Pcm And I2C Interfaces

    LTE-A Module Series EG060V-EA Hardware Design 4.7K VDD_EXT VDD_EXT 1 nF Module MCU/ARM MAIN_RXD MAIN_TXD 1 nF VDD_EXT VCC_MCU 4.7K MAIN_RTS MAIN_CTS GPIO MAIN_DTR EINT MAIN_RI GPIO MAIN_DCD Figure 22: Reference Design of Transistor Circuit NOTES The transistor circuit solution is not suitable for applications with high baud rates exceeding 460 kbps. Please note that the module MAIN_CTS and MAIN_RTS are connected respectively to the host CTS and RTS.
  • Page 46 LTE-A Module Series EG060V-EA Hardware Design The module supports 16-bit linear data format. The following figures show the relationship between 8 kHz PCM_SYNC and 2048 kHz PCM_CLK in the primary mode. 125 μs PCM_CLK PCM_SYNC PCM_DOUT PCM_DIN Figure 23: Primary Mode Timing The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio codec design.
  • Page 47: Adc Interfaces

    LTE-A Module Series EG060V-EA Hardware Design short frame synchronization format with 2048 kHz PCM_CLK and 8 kHz PCM_SYNC. Please refer to AT+QDAI command in document [1] for details. The following figure shows a reference design of PCM interface with an external codec IC. MICBIAS PCM_CLK BCLK...
  • Page 48: Network Indication Interface

    LTE-A Module Series EG060V-EA Hardware Design Table 15: Pin Definition of ADC Interfaces Pin Name Pin No. Description DC Characteristics ADC0 General-purpose ADC interface Voltage range: 0 to 1.4 V ADC1 General-purpose ADC interface The following table describes the characteristics of the ADC interfaces. Table 16: Parameters of ADC Interfaces Item Min.
  • Page 49: Module Status Indication Interface

    LTE-A Module Series EG060V-EA Hardware Design Table 18: Working State of Network Mode/Status Indication Pins Pin Name Status Description Always High Registered on LTE network NET_MODE Always Low Other circumstances LEDs flicker slowly (200 ms High / 1800 ms Low) Network searching LEDs flicker slowly (1800 ms High / 200 ms Low) Idle...
  • Page 50: Ri Behaviors

    LTE-A Module Series EG060V-EA Hardware Design The following table describes the pin definition of STATUS. Table 19: Pin Definition of STATUS Pin Name Pin No. Description Comment Indicate the module’s operation status STATUS 1.8 V power domain Below is a reference design of the pin. VBAT Module 2.2K...
  • Page 51: Pcie Interface

    LTE-A Module Series EG060V-EA Hardware Design In addition, RI behavior can be configured flexibly. The default behavior of RI is shown below. Table 20: Behavior of RI State Response Idle RI stays at high level RI outputs 120 ms low pulse when a new URC returns. The RI behavior can be changed by the AT+QCFG="urc/ri/ring"...
  • Page 52: Wlan Control Interface

    LTE-A Module Series EG060V-EA Hardware Design If unused, keep it open. In master mode, it is an output signal. PCIE_RST_N PCIe reset In slave mode, it is an input signal. If unused, keep it open. In master mode, it is an input signal. In slave mode, it is an output signal.
  • Page 53: Sd Card Interface

    LTE-A Module Series EG060V-EA Hardware Design COEX_TXD LTE&WLAN coexistence transmit 1.8 V power domain WLAN_SLP_CLK 169 WLAN sleep clock 1.8 V power domain NOTE “*” means under development. 3.19. SD Card Interface* EG060V-EA provides one SD card interface which supports SD 3.0 protocol. The following table shows the pin definition.
  • Page 54 LTE-A Module Series EG060V-EA Hardware Design Below is a reference design of the SD card interface of the module. Module SD Card Connector VDD_EXT VDD_3V3 SDIO_VDD 100 uF 100 nF 33 pF 10 pF 470K 100K 100K 100K 100K 100K R1 0R SDIO_DATA3 CD/DAT3...
  • Page 55: Spi Interface

    LTE-A Module Series EG060V-EA Hardware Design 3.20. SPI Interface EG060V-EA provides one SPI interface which only supports master mode with a maximum clock frequency up to 50 MHz. The following table shows the pin definition of SPI interface. Table 24: Pin Definition of SPI Interface Pin Name Pin No.
  • Page 56: Usb_Boot Interface

    LTE-A Module Series EG060V-EA Hardware Design t(cl) SPI clock low level time t(mov) SPI master data output valid time -5.0 t(mis) SPI master data input setup time t(mih) SPI master data input hold time The voltage range of the SPI interface is 1.8 V. Therefore, A level translator between module and host should be used if the application is equipped with a 3.3 V processor or device interface.
  • Page 57 LTE-A Module Series EG060V-EA Hardware Design Below is a reference design of USB_BOOT interface. Module VDD_EXT Test point 4.7 k USB_BOOT Close to module Figure 30: Reference Design of USB_BOOT Interface EG060V-EA_Hardware_Design 56 / 82...
  • Page 58: Antenna Interfaces

    LTE-A Module Series EG060V-EA Hardware Design Antenna Interfaces EG060V-EA provides a main antenna interface and an Rx-diversity antenna interface which is used to resist the fall of signals caused by high speed movement and multipath effect. The impedance of antenna ports is 50 Ω.
  • Page 59: Reference Design Of Rf Antenna Interface

    LTE-A Module Series EG060V-EA Hardware Design LTE B7 2500–2570 2620–2690 LTE B8 880–915 925–960 LTE B20 832–862 791–821 LTE B28 703–748 758–803 LTE B38 2570–2620 2570–2620 LTE B40 2300–2400 2300–2400 LTE B41 2496–2690 2496–2690 4.1.3. Reference Design of RF Antenna Interface A reference design of ANT_MAIN and ANT_DRX antenna interface is shown below.
  • Page 60: Reference Design Of Rf Layout

    LTE-A Module Series EG060V-EA Hardware Design 4.1.4. Reference Design of RF Layout For the module to be applicable to your PCB, the characteristic impedance of all RF traces should be controlled at 50 Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’...
  • Page 61 LTE-A Module Series EG060V-EA Hardware Design Figure 35: Reference Design of Coplanar Waveguide on 4-layer PCB (Layer 4 as Reference Ground) In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design: ⚫...
  • Page 62: Antenna Installation

    LTE-A Module Series EG060V-EA Hardware Design 4.2. Antenna Installation 4.2.1. Antenna Requirement The following table shows the requirements on main antenna and Rx-diversity antenna. Table 29: Antenna Requirements Type Requirements VSWR: ≤ 2 Efficiency: > 30 % Max Input Power: 50 W Input Impedance: 50 Ω...
  • Page 63 LTE-A Module Series EG060V-EA Hardware Design U.FL-LP connector series listed in the following figure can be used to match the U.FL-R-SMT. Figure 37: Mechanical Features of U.FL-LP Connectors The following figure illustrates the space factor of mated connectors. Figure 38: Form Factor of Mated Connectors (Unit: mm) For more details, please visit https://www.hirose.com/?lang=en.
  • Page 64: Electrical, Reliability And Radio Characteristics

    LTE-A Module Series EG060V-EA Hardware Design Electrical, Reliability and Radio Characteristics 5.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 30: Absolute Maximum Ratings Item Min.
  • Page 65: Power Supply Ratings

    LTE-A Module Series EG060V-EA Hardware Design 5.2. Power Supply Ratings Table 31: Module Power Supply Ratings Item Description Conditions Min. Typ. Max. Unit The actual input voltages must VBAT_BB and VBAT stay between the minimum VBAT_RF and maximum values. USB connection USB_VBUS 5.25 detect...
  • Page 66: Current Consumption

    LTE-A Module Series EG060V-EA Hardware Design 5.4. Current Consumption Table 33: Module Current Consumption Description Conditions Typ. Unit OFF state Power down µA AT+CFUN=0 (USB disconnected) 2.218 WCDMA PF = 64 (USB disconnected) 4.143 WCDMA PF = 128 (USB disconnected) 3.295 WCDMA PF = 512 (USB disconnected) 2.607...
  • Page 67 LTE-A Module Series EG060V-EA Hardware Design WCDMA B8 HSUPA CH3012 @ 20.00 dBm LTE-FDD B1 CH300 @ 22.90 dBm LTE-FDD B3 CH1575 @ 21.75 dBm LTE-FDD B5 CH2525 @ 23.18 dBm LTE-FDD B7 CH3100 @ 22.08 dBm LTE-FDD B8 CH3625 @ 23.17 dBm LTE data transfer LTE-FDD B20 CH6300 @ 23.06 dBm LTE-FDD B28 CH27435 @ 23.21 dBm...
  • Page 68: Rf Output Power

    LTE-A Module Series EG060V-EA Hardware Design LTE-FDD B7 + B28 @ 22.03 dBm LTE-TDD B38 + B38 @ 21.75 dBm LTE-TDD B40 + B40 @ 21.86 dBm LTE-TDD B41 + B41 @ 21.79 dBm WCDMA B1 CH10700 @ 22.53 dBm WCDMA voice call WCDMA B5 CH4407 @ 22.66 dBm WCDMA B8 CH3012 @ 22.83 dBm...
  • Page 69: Rf Receiving Sensitivity

    LTE-A Module Series EG060V-EA Hardware Design 5.6. RF Receiving Sensitivity The following tables show conducted RF receiving sensitivity of the module. Table 35: Conducted RF Receiving Sensitivity Frequency Primary Diversity SIMO 3GPP (SIMO) WCDMA B1 -109.5 -106.7 WCDMA B5 -109.5 -104.7 WCDMA B8 -109.5...
  • Page 70: Thermal Consideration

    LTE-A Module Series EG060V-EA Hardware Design application that incorporates the module. The following table shows the electrostatic discharge characteristics of the module. Table 36: Electrostatic Discharge Characteristics Tested Points Contact Discharge Air Discharge Unit ±5 ±10 VBAT, GND ±4 ±8 Antenna Interfaces ±0.5 ±1...
  • Page 71 LTE-A Module Series EG060V-EA Hardware Design Below are two reference designs of heatsink. You can choose one or both of them according to application structures. Module Heatsink Heatsink Thermal Pad Shielding Cover Application Board Application Board Figure 39: Reference Design of Heatsink (Heatsink at the Top of the Module) Thermal Pad Thermal Pad Module...
  • Page 72 LTE-A Module Series EG060V-EA Hardware Design possible extent to maintain the module’s internal temperature below 105 °C. You can execute the AT+QTEMP command to get the module’s internal temperature. For more detailed guides on thermal design, please refer to document [5]. EG060V-EA_Hardware_Design 71 / 82...
  • Page 73: Mechanical Dimensions

    LTE-A Module Series EG060V-EA Hardware Design Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in millimeter (mm), and the dimensional tolerances are ± 0.05 mm unless otherwise specified. 6.1. Mechanical Dimensions of the Module Figure 41: Top and Side Dimensions of the Module EG060V-EA_Hardware_Design 72 / 82...
  • Page 74 LTE-A Module Series EG060V-EA Hardware Design Figure 42: Bottom Dimensions (Bottom View) of the Module NOTE The package warpage level of the module conforms to JEITA ED-7306 standard. EG060V-EA_Hardware_Design 73 / 82...
  • Page 75: Recommended Footprint

    LTE-A Module Series EG060V-EA Hardware Design 6.2. Recommended Footprint Figure 43: Recommended Footprint (Top View) NOTE For easy maintenance of the module, keep about 3 mm between the module and other components on the motherboard. EG060V-EA_Hardware_Design 74 / 82...
  • Page 76: Renderings Of The Module

    6.3. Renderings of the Module Figure 44: Top View of the Module Figure 45: Bottom View of the Module NOTE These are renderings of EG060V-EA module. For authentic appearance, please refer to the module received from Quectel. EG060V-EA_Hardware_Design 75 / 82...
  • Page 77: Storage, Manufacturing And Packaging

    LTE-A Module Series EG060V-EA Hardware Design Storage, Manufacturing and Packaging 7.1. Storage EG060V-EA is provided with vacuum-sealed packaging. MSL of the module is rated as 3. The storage requirements are shown below. 1. Recommended Storage Condition: The temperature should be 23 ± 5 ° C and the relative humidity should be 35–60 %.
  • Page 78: Manufacturing And Soldering

    LTE-A Module Series EG060V-EA Hardware Design NOTES This floor life is only applicable when the environment conforms to IPC/JEDEC J-STD-033. 2. To avoid blistering, layer separation and other soldering issues, it is forbidden to expose the modules to the air for a long time. If the temperature and moisture do not conform to IPC/JEDEC J-STD-033 or the relative moisture is over 60 %, It is recommended to start the solder reflow process within 24 hours after the package is removed.
  • Page 79 LTE-A Module Series EG060V-EA Hardware Design Temp. (°C) Reflow Zone Max slope: Cooling down slope: 2~3 °C/s -1.5 ~ -3 °C/s Soak Zone Max slope: 1~3 °C/s Figure 46: Recommended Reflow Soldering Thermal Profile Table 37: Recommended Thermal Profile Parameters Factor Recommendation Soak Zone...
  • Page 80: Packaging

    LTE-A Module Series EG060V-EA Hardware Design 7.3. Packaging EG060V-EA is packaged in tape and reel carriers. One reel is 10.56 meters long and contains 200 modules. The figures below show the packaging details, measured in mm. Figure 47: Tape Specifications Figure 48: Reel Specifications EG060V-EA_Hardware_Design 79 / 82...
  • Page 81: Appendix References

    AT Commands Manual for EG060V-EA Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Quectel_EG060V-EA_Reference_Design EG060V-EA Reference Design Quectel_RF_Layout_Application_Note RF Layout Application Note Thermal Design Guide Quectel Quectel_Module_Thermal_Design_Guide modules Table 39: Terms and Abbreviations Abbreviation Description Adaptive Multi-rate Bits per Second CHAP Challenge Handshake Authentication Protocol...
  • Page 82 LTE-A Module Series EG060V-EA Hardware Design Half Rate HSPA High Speed Packet Access HSDPA High Speed Downlink Packet Access HSUPA High Speed Uplink Packet Access Input/Output Inorm Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution MIMO Multiple Input Multiple Output Mobile Originated Mobile Station Mobile Terminated...
  • Page 83 LTE-A Module Series EG060V-EA Hardware Design Time Division Duplexing Transmitting Direction UMTS Universal Mobile Telecommunications System Unsolicited Result Code (U)SIM Universal Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value...

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