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Chapter 1: AC701 Evaluation Board Features
Configuration Options
The FPGA on the AC701 board can be configured using these methods:
•
•
See
The method used to configure the FPGA is controlled by the mode pins (M2, M1, M0)
setting selected through DIP switch SW1.
settings.
Table 1-32: Mode Switch SW1 Settings
Figure 1-41
X-Ref Target - Figure 1-41
Figure 1-42
68
Master SPI (uses the Quad-SPI Flash U7).
JTAG (uses the U26 Digilent USB-to-JTAG Bridge or J4 Download Cable connector).
USB JTAG Module, page 20
SeeUG480, 7 Series FPGAs XADC Dual 12-Bit 1MSPS Analog-to-Digital Converter User
Guide for further details on configuration modes.
Configuration
Mode Pins (M[2:0])
Mode
Master SPI
JTAG
shows mode switch SW1.
FPGA_3V3
shows the QSPI U7 configuration circuit.
www.xilinx.com
for more information.
Table 1-32
x1, x2, x4
001
101
SW1
ON
10
1
9
2
8
3
SDA03H1SBD
R337
1.21K
0.1W
1%
R338
1.21K
0.1 W
1%
GND
Figure 1-41: Mode Switch
lists the supported mode switch
Bus
CCLK
Width
Direction
Output
x1
Not Applicable
FPGA_M0
FPGA_M1
FPGA_M2
R339
1.21K
0.1W
1%
UG952_c1_41_100512
AC701 Evaluation Board
UG952 (v1.0) October 23, 2012
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