Frequency Synthesizers; Figure 18: Power Control Loop - Nokia NSB-5 Series Technical Documentation Manual

NSB-5
System Module
DIR. COUPLER
RF_OUT
K
cp
DETECTOR
K
det

Frequency Synthesizers

A 13 MHz VCTCXO module is used as a stable reference for both the RF and BB circuitry.
Temperature variations in the VCTCXO module are controlled by an AFC voltage, which is
generated by a 11 bit D/A converter in COBBA_GJ. The output of the VCTCXO module
feeds both the UHF PLL and the VHF PLL (both of which are located in SUMMA) and the
BB circuitry for A/D conversion. The BB uses this information for frequency compensation
algorithms.
The UHF synthesizers contains a 64/65 dual modulus prescaler, a "N" and "A" divider, a
reference divide, a phase detector, a charge pump, a (VCO), and a lowpass filter. The UHF
and VHF PLL are controlled with three serial busses; a data bus (SDATA), a serial clock bus
(SCLK) and a latch enable (SLE). The UHF LO signal is generated by the UHF VCO module
which has a tunable frequency range from 1443 MHz to 1510 MHz for the GSM1900
engine. A sample of the LO signal is fed to the 64/65 prescaler. The signal is then fed to
the programmable dividers (N and A) which are programmed via the serial bus. This out-
put then becomes one of the inputs to the phase detector. The other input to the phase
Page 60
R1
K=–R1/R2
ERROR
DOMINATING AMPLIFIER
POLE R2
–
+
CCONT
COBBA
ADC
MCU
DSP

Figure 18: Power Control Loop

Nokia Mobile Phones Ltd.
PAMS Technical Documentation
PA
RF_IN
K
PA
TXC
DAC
Issue 1 03/01