Nokia NSB-5 Series Technical Documentation Manual page 40

NSB-5
System Module
E11 VCXOPwr
F11 HookDet
G11 VCC_CORE
H11 MCUGenIO1
J11 ROM2SelX
K11 RFClk
L11 JTDO
M11 RAMSelX
N11 ROM1SelX
A12 SIMCardClk
B12 CCONTInt
C12 TxPwr
D12 SIMCardPwr
E12 MCUGenIO3
F12 LoByteSelX
G12 VibraPWM
H12 TestMode
J12 GND
K12 RFClkGnd
L12 CoEmu0
M12 JTClk
N12 JTRst
A13 Clk32k
B13 PURX
Page 40
O 2 VCXO regulator control
I/O Non-MBUS accessory con-
nection detector
PWR Core power
I/O 2/up General purpose I/O port
I/O 2/up Extra chip select, can be
used as MCU general out-
put
I System clock from VCTCXO
I/O 2/up JTAG data out
O 2 RAM chip select
O 2 ROM chip select
O 2 SIM clock
I CCONT interrupt
I/O 2/down Tx regulator control
I/O 2/up SIM power control
I/O 2/up General purpose I/O port
I/O 2/up
I/O 2/down Vibra PWM control
I Down Test mode select
GND Ground
I System clock reference
ground input
I/O 2/up DSP/MCU emulation port 0
I/O Up JTAG clock
I/O Down JTAG reset
I Sleep clock oscillator input
I Power-up reset
Nokia Mobile Phones Ltd.
PAMS Technical Documentation
Sleep control (to CCONT
SLEEPX input)
Non-MBUS accessory
connection detector
(system conn. XEAR)
Core power – supplied
from CCONT V2V
FLASH write protect
Enable for 2M FLASH
chip
System clock from
VCTCXO
JTAG data out
RAM chip select
Enable for 4M FLASH
chip
SIM clock (to CCONT)
CCONT interrupt
Tx regulator control (to
CCONT)
SIM power control (to
CCONT)
VPP supply for FLASH
ROLLER_B – Input bit
for roller
Vibra PWM control
Test mode select (GND)
GND
System clock reference
ground input (GND)
DSP/MCU emulation
port 0 – JTAG
JTAG clock
JTAG reset
Sleep clock oscillator
input
Power-up reset (from
CCONT)
Issue 1 03/01